Three dimensional memory device containing resonant tunneling barrier and high mobility channel and method of making thereof
A three-dimensional memory device containing a plurality of levels of memory elements includes a memory film containing a layer stack that includes a resonant tunneling barrier stack, a semiconductor barrier layer, and a memory material layer located between the resonant tunneling barrier stack and the semiconductor barrier layer, a semiconductor channel, and a control gate electrode.
1. A three-dimensional memory device comprises a plurality of levels of memory elements, comprising:
a memory film comprising a layer stack that includes a resonant tunneling barrier stack, a semiconductor barrier layer, and a memory material layer located between the resonant tunneling barrier stack and the semiconductor barrier layer;
a semiconductor channel;
a control gate electrode;
at least one instance of a unit layer stack including a source layer, a channel-containing layer that contains the semiconductor channel, and a drain layer that are stacked along a vertical direction over a substrate;
a memory opening vertically extending through the at least one instance of the unit layer stack; and
a memory opening fill structure located in the memory opening and comprising the memory film and the control gate electrode in contact with an inner sidewall of the memory film;
wherein:
the resonant tunneling barrier stack comprises at least two semiconductor quantum wells which comprise a first quantum well and a second quantum well located between the first quantum well and the control gate electrode;
the first quantum well comprises a first semiconductor well layer located between a first barrier layer and a second barrier layer;
the second quantum well comprises a second semiconductor well layer located between the second barrier layer and a third barrier layer;
the first semiconductor well layer is thinner than the second semiconductor well layer;
the first semiconductor well layer and the second semiconductor well layer have a narrower bandgap than the first, second, and third barrier layers; and
the first semiconductor well layer and the second semiconductor well layer comprise indium arsenide, and the first, second, and third barrier layers comprise aluminum antimonide.
2. The three-dimensional memory device of claim 1 , wherein:
the memory material layer comprises a dielectric charge storage material;
the semiconductor channel comprises a first compound semiconductor material; and
the semiconductor barrier layer comprises a second compound semiconductor material having a wider bandgap than the first compound semiconductor material.
3. The three-dimensional memory device of claim 2 , wherein the memory material layer comprises a silicon nitride layer and the semiconductor channel comprises an indium arsenide layer.
4. The three-dimensional memory device of claim 3 , wherein the semiconductor barrier layer comprises an aluminum antimonide layer which is thicker than the resonant tunneling barrier stack.
5. A three-dimensional memory device comprises a plurality of levels of memory elements, comprising:
a memory film comprising a layer stack that includes a resonant tunneling barrier stack, a semiconductor barrier layer, and a memory material layer located between the resonant tunneling barrier stack and the semiconductor barrier layer;
a semiconductor channel; and
a control gate electrode;
wherein:
the semiconductor barrier layer is located between the memory material layer and the semiconductor channel; and
the resonant tunneling barrier stack is located between the memory material layer and the control gate electrode.
6. The three-dimensional memory device of claim 5 , wherein:
the semiconductor barrier layer is surrounded by the semiconductor channel;
the memory material layer is surrounded by the semiconductor barrier layer; and
the resonant tunneling barrier stack is surrounded by the memory material layer.
7. A three-dimensional memory device comprises a plurality of levels of memory elements, comprising:
a memory film comprising a layer stack that includes a resonant tunneling barrier stack, a semiconductor barrier layer, and a memory material layer located between the resonant tunneling barrier stack and the semiconductor barrier layer;
a semiconductor channel; and
a control gate electrode;
wherein:
the resonant tunneling barrier stack is located between the memory material layer and the semiconductor channel; and
the semiconductor barrier layer is located between the memory material layer and the control gate electrode.
8. The three-dimensional memory device of claim 7 , wherein:
the semiconductor barrier layer surrounds the control gate electrode;
the memory material layer surrounds the semiconductor barrier layer; and
the resonant tunneling barrier stack surrounds the memory material layer.