IP Library › Granted Patent US 12,205,948
Granted Patent B2
US 12,205,948 · App. 17/728,946 · Granted Jan 21, 2025

Semiconductor device

Inventor: Soichi Yoshida (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L27/0727H01L29/41708H01L29/7397H01L29/861
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Quick Facts
Patent No.
US 12,205,948
App. No.
17/728,946
Granted
Jan 21, 2025
Kind
B2
Abstract

Provided is a semiconductor device, wherein a straight line extending from an end portion E 1 in the extending direction of a contact hole for electrically connecting an emitter electrode and a front surface of a semiconductor substrate toward a back surface of the semiconductor substrate is defined as a first perpendicular line, a straight line forming a predetermined angle θ 1 with respect to the first perpendicular line and passing through the end portion E 1 in the extending direction of the contact hole is defined as a first straight line, a position where the first straight line intersects a back surface of the semiconductor substrate is defined as a position M 1 , and the position M 1 is located on an outer side of a cathode region in the extending direction.

Claims (77)

1. A semiconductor device comprising:

a transistor portion provided in a semiconductor substrate, having an emitter region of a first conductivity type on a front surface side of the semiconductor substrate, and having a collector region of a second conductivity type on a back surface side of the semiconductor substrate;

a diode portion provided in the semiconductor substrate, and having a cathode region of a first conductivity type on a back surface side of the semiconductor substrate;

a plurality of trench portions provided extending in a predetermined extending direction in a plane parallel to a front surface of the semiconductor substrate; and

an emitter electrode provided above the semiconductor substrate, and electrically connected to a front surface of the semiconductor substrate, wherein

a straight line extending from an end portion E 1 in the extending direction of a contact hole for electrically connecting the emitter electrode and a front surface of the semiconductor substrate toward a back surface of the semiconductor substrate is defined as a first perpendicular line,

a straight line forming a predetermined angle θ 1 with respect to the first perpendicular line and passing through the end portion E 1 in the extending direction of the contact hole is defined as a first straight line,

a position where the first straight line intersects a back surface of the semiconductor substrate is defined as a position M 1 ,

the position M 1 is located on an outer side of the cathode region in the extending direction, and

the angle θ 1 is 20° or more and 80° or less.

2. The semiconductor device according to claim 1 , wherein

the angle θ 1 is 30° or more and 60° or less.

3. The semiconductor device according to claim 1 , wherein

a front surface side lifetime reduction region is provided on a front surface side of the semiconductor substrate, and

an end portion E 2 in the extending direction of the front surface side lifetime reduction region is located close to the cathode region side with respect to the end portion E 1 in the extending direction of the contact hole.

4. The semiconductor device according to claim 3 , wherein

the end portion E 2 in the extending direction of the front surface side lifetime reduction region is located on an outer side of the cathode region.

5. The semiconductor device according to claim 3 , wherein

the end portion E 2 in the extending direction of the front surface side lifetime reduction region is located close to the cathode region side with respect to the first straight line.

6. The semiconductor device according to claim 3 , wherein

the end portion E 2 in the extending direction of the front surface side lifetime reduction region is provided, in the extending direction, between the position M 1 and the end portion E 1 in the extending direction of the contact hole.

7. The semiconductor device according to claim 3 , wherein

a straight line extending from the end portion E 2 in the extending direction of the front surface side lifetime reduction region toward a back surface of the semiconductor substrate is defined as a second perpendicular line,

a straight line forming a predetermined angle θ 2 with respect to the second perpendicular line and passing through the end portion E 2 in the extending direction of the front surface side lifetime reduction region is defined as a second straight line,

a position where the second straight line intersects a back surface of the semiconductor substrate is defined as a position N 2 ,

the position N 2 is located on an outer side of the cathode region in the extending direction, and

the angle θ 2 is 20° or more and 80° or less.

8. The semiconductor device according to claim 3 , wherein

the end portion E 2 in the extending direction of the front surface side lifetime reduction region is provided between the position M 1 and the cathode region.

9. The semiconductor device according to claim 1 , wherein

the transistor portion includes one or more gate trench portions which are provided from a front surface of the semiconductor substrate to a position deeper than the emitter region and to which a gate potential is applied.

10. The semiconductor device according to claim 1 , wherein

the transistor portion includes one or more dummy trench portions which are provided from a front surface of the semiconductor substrate to a position deeper than the emitter region and to which a potential different from a gate potential is applied.

11. The semiconductor device according to claim 1 , wherein

the diode portion includes one or more dummy trench portions which are provided from a front surface of the semiconductor substrate to a position deeper than the emitter region and to which a potential different from a gate potential is applied.

12. The semiconductor device according to claim 1 , comprising:

a boundary portion provided between the transistor portion and the diode portion in the semiconductor substrate, having no emitter region on a front surface side of the semiconductor substrate, and having the collector region on a back surface side of the semiconductor substrate.

13. The semiconductor device according to claim 12 , wherein

the boundary portion includes one or more dummy trench portions which are provided from a front surface of the semiconductor substrate to a position deeper than the emitter region and to which a potential different from a gate potential is applied.

14. The semiconductor device according to claim 12 , wherein

a mesa portion of the transistor portion is sandwiched between dummy trench portions, the mesa portion including the emitter region and being closest to the boundary portion.

15. The semiconductor device according to claim 1 , comprising:

an interlayer dielectric film provided between a front surface of the semiconductor substrate and the emitter electrode, wherein

the interlayer dielectric film is provided with a contact hole opened to electrically connect a front surface of the semiconductor substrate and the emitter electrode.

16. The semiconductor device according to claim 1 , wherein

the angle θ 1 is 45° or less.

17. The semiconductor device according to claim 1 , wherein

an extending direction of the plurality of trench portions in the transistor portion is equal to an extending direction of the plurality of trench portions in the diode portion in a front surface of the semiconductor substrate.

18. A semiconductor device comprising:

a transistor portion provided in a semiconductor substrate, having an emitter region of a first conductivity type on a front surface side of the semiconductor substrate, and having a collector region of a second conductivity type on a back surface side of the semiconductor substrate;

a diode portion provided in the semiconductor substrate, and having a cathode region of a first conductivity type on a back surface side of the semiconductor substrate;

a plurality of trench portions provided to be arranged in a predetermined arrangement direction in a plane parallel to a front surface of the semiconductor substrate; and

an emitter electrode provided above the semiconductor substrate, and electrically connected to a front surface of the semiconductor substrate, wherein

a straight line extending from an end portion E 3 in the arrangement direction of a contact hole for electrically connecting the emitter electrode and the emitter region toward a back surface of the semiconductor substrate is defined as a third perpendicular line,

a straight line forming a predetermined angle θ 3 with respect to the third perpendicular line and passing through the end portion E 3 in the arrangement direction of the contact hole is defined as a third straight line,

a position where the third straight line intersects a back surface of the semiconductor substrate is defined as a position M 3 ,

the position M 3 is located on an outer side of the cathode region in the arrangement direction, and

the angle θ 3 is 20° or more and 80° or less.

19. The semiconductor device according to claim 18 , wherein

the angle θ 3 is 30° or more and 60° or less.

20. The semiconductor device according to claim 18 , wherein

a front surface side lifetime reduction region is provided on a front surface side of the semiconductor substrate, and

an end portion E 4 in the arrangement direction of the front surface side lifetime reduction region is located close to the cathode region side with respect to the end portion E 3 in the arrangement direction of the contact hole.

21. The semiconductor device according to claim 20 , wherein

the end portion E 4 in the arrangement direction of the front surface side lifetime reduction region is located on an outer side of the cathode region.

22. The semiconductor device according to claim 20 , wherein

the end portion E 4 in the arrangement direction of the front surface side lifetime reduction region is located close to the cathode region side with respect to the third straight line.

23. The semiconductor device according to claim 20 , wherein

a straight line extending from the end portion E 4 in the arrangement direction of the front surface side lifetime reduction region toward a back surface of the semiconductor substrate is defined as a fourth perpendicular line,

a straight line forming a predetermined angle θ 4 with respect to the fourth perpendicular line and passing through the end portion E 4 in the arrangement direction of the front surface side lifetime reduction region is defined as a fourth straight line,

a position where the fourth straight line intersects a back surface of the semiconductor substrate is defined as a position N 4 ,

the position N 4 is located on an outer side of the cathode region in the arrangement direction, and

the angle θ 4 is 20° or more and 80° or less.

24. The semiconductor device according to claim 20 , wherein

the end portion E 4 in the arrangement direction of the front surface side lifetime reduction region is provided between the position M 3 and the cathode region.

25. The semiconductor device according to claim 20 , wherein

the position M 3 is provided close to the transistor portion with respect to the end portion E 4 of the front surface side lifetime reduction region in the arrangement direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2022
From: YOSHIDA, SOICHI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 059703/0223 →
Priority Claims (1)
JP 2020-081020 · May 1, 2020 · national
Continuity (2)
Continuation PCTJP2021016926 · Apr 28, 2021
Related Publication 20220254775A1 · Aug 11, 2022
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