Semiconductor structure and method for manufacturing same
A method for manufacturing a semiconductor structure includes: forming multiple trenches spaced apart from each other and extending in a first direction in a substrate, and forming a first insulating layer on sidewalls and bottoms of the trenches; forming a first conductive layer on a surface of the first insulating layer; removing part of the first conductive layer to an initial depth by a first etching process; removing remaining part of the first conductive layer to a target depth by a second etching process.
1. A method for manufacturing a semiconductor structure, comprising:
forming a plurality of trenches spaced apart from each other and extending in a first direction in a substrate, and forming a first insulating layer on sidewalls and bottoms of the trenches;
forming a first conductive layer on a surface of the first insulating layer;
removing part of the first conductive layer to an initial depth by a first etching process, wherein the first etching process is a multi-step process comprising a first dry etching process and a second dry etching process, and wherein an etching rate of the second dry etching process is less than an etching rate of the first dry etching process; and
removing remaining part of the first conductive layer to a target depth by a second etching process, wherein the second etching process comprises a wet etching process and wherein an etchant adopted in the wet etching process comprises a sulfuric peroxide mixture.
2. The method according to claim 1 , wherein the forming a first conductive layer on a surface of the first insulating layer comprises:
depositing the first conductive layer on the surface of the first insulating layer and the substrate, the first conductive layer filling the trenches on which the first insulating layer is formed and covering the substrate.
3. The method according to claim 2 , wherein the first conductive layer comprises a metal conductive layer.
4. The method according to claim 2 , wherein removing part of the first conductive layer to an initial depth by a first etching process comprises:
dry etching the first conductive layer to completely remove the first conductive layer on the substrate and to remove the first conductive layer in the trenches to the initial depth.
5. The method according to claim 4 , wherein an etching depth of the dry etching process is 40-50 nm.
6. The method according to claim 4 , wherein source power of the dry etching process ranges from 200 W to 300 W, and bias power of the dry etching process ranges from 100 W to 200 W.
7. The method according to claim 4 , wherein while dry etching the first conductive layer, an etching gas comprises at least one of argon, nitrogen, chlorine, or nitrogen trifluoride.
8. The method according to claim 7 , wherein volume flow rate of argon is 100-300 sccm, volume flow rate of nitrogen is 10-40 sccm, volume flow rate of chlorine is 50-100 sccm, and volume flow rate of nitrogen trifluoride is 10-40 sccm.
9. The method according to claim 1 , wherein the etchant adopted in the wet etching process comprises sulfuric acid with 96% of mass fraction and hydrogen peroxide with 30% of mass fraction.
10. The method according to claim 9 , wherein a volume ratio of sulfuric acid to hydrogen peroxide in the etchant is 5:1-8:1.
11. The method according to claim 9 , wherein an etching depth of the wet etching process is 10-15 nm.
12. The method according to claim 1 , wherein the method further comprises: sequentially forming a second conductive layer and a protective layer on the first conductive layer etched in the trenches, the second conductive layer covering the first conductive layer and the protective layer covering the second conductive layer.
13. The method according to claim 12 , wherein a material of the second conductive layer comprises a semiconductor material or a doped semiconductor material.
14. The method according to claim 1 , wherein the substrate comprises a plurality of active areas spaced apart from each other and shallow groove isolation structures for isolating each of the active areas;
the forming a plurality of trenches spaced apart from each other and extending in a first direction in a substrate, and forming a first insulating layer on sidewalls and bottoms of the trenches comprises:
etching the active areas and the shallow trench isolation structures to form the trenches; and
depositing the first insulating layer on the sidewalls and the bottoms of the trenches.
15. A semiconductor structure, prepared by the method according to claim 1 .
16. The method according to claim 1 , wherein the first conductive layer includes a metal conductive layer which is a single layer or comprises multiple layers.
17. The method according to claim 12 , wherein a space formed by the wet etching process is used to accommodate the second conductive layer.
18. The method according to claim 1 , before forming a plurality of trenches spaced apart from each other and extending in a first direction in a substrate, the method further comprises:
forming a second insulating layer on a surface of the substrate by a thermal oxidation process.