Granted Patent B2

US 12,488,175 · App. 17/871,893 · Granted Dec 2, 2025

Inventors: Akira Fujimura (Saratoga, CA); Nagesh Shirali (San Jose, CA); Donald Oriordan (Sunnyvale, CA)

Assignee: D2S, INC.

G06F30/3953G06F30/27G06F30/392G06F30/398G06N3/045G06T7/0004G06T7/0006G06F2119/06G06F2119/10G06T2207/20084G06T2207/30121G06T2207/30148H10D86/441H10D86/60H10D89/60

Abstract

Claims (23)

1 . A method for calculating parasitic parameters for a wire structure that is to be manufactured on a substrate, the method comprising:

receiving the wire structure;

performing a rasterization operation on the wire structure to produce a pixel-based definition for each of a plurality of images that collectively represent the wire structure; and

using the pixel-based definition of the plurality of images as inputs to a neural network to calculate parasitic parameters of the wire structure.

2 . The method of claim 1 , wherein the neural network accounts for variations in process technology.

3 . The method of claim 2 , wherein the neural network uses a pre-determined set of weights corresponding to each variation in process technology.

4 . The method of claim 1 , wherein each image in the plurality of images corresponds to a layer in the wire structure.

5 . The method of claim 1 , wherein the wire structure comprises a plurality of rectilinear shapes.

6 . The method of claim 1 , wherein the wire structure comprises a plurality of curvilinear shapes.

7 . The method of claim 6 , wherein the neural network is a first neural network and the curvilinear shapes are generated by a second neural network that is trained for shape prediction.

8 . The method of claim 7 , wherein the curvilinear shapes are generated from multiple wire tracks that cross each other.

9 . The method of claim 8 , wherein the generating further comprises sub-segmentation of the curvilinear shapes.

10 . The method of claim 1 , wherein the parasitic parameters include at least one parasitic capacitance value representing predicted, unwanted parasitic capacitance exerted on at least one wire of the wire structure.

11 . The method of claim 10 , wherein the parasitic parameters include a plurality of parasitic capacitance values representing a plurality of predicted, unwanted parasitic capacitances exerted on a plurality of wires of the wire structure.

12 . A non-transitory machine readable medium storing a program for calculating parasitic parameters for a wire structure that is to be manufactured on a substrate, the program comprising sets of instructions for:

receiving the wire structure;

performing a rasterization operation on the wire structure to produce a pixel-based definition for each of a plurality of images that collectively represent the wire structure; and

using the pixel-based definition of the plurality of images as inputs to a neural network to calculate parasitic parameters of the wire structure.

13 . The non-transitory machine readable medium of claim 12 , wherein the neural network accounts for variations in process technology.

14 . The non-transitory machine readable medium of claim 13 , wherein the neural network uses a pre-determined set of weights corresponding to each variation in process technology.

15 . The non-transitory machine readable medium of claim 12 , wherein each image in the plurality of images corresponds to a layer in the wire structure.

16 . The non-transitory machine readable medium of claim 12 , wherein the wire structure comprises a plurality of rectilinear shapes.

17 . The non-transitory machine readable medium of claim 12 , wherein the wire structure comprises a plurality of curvilinear shapes.

Assignments (2)

Continuity (2)

References Cited (166)