IP Library › Granted Patent US 12,751,046
Granted Patent B2
US 12,751,046 · App. 18/152,976 · Granted Sep 29, 2026

Semiconductor device including two-dimensional material and method of manufacturing the same

Inventors: Duseop Yoon (Suwon-si, KR); Junyoung Kwon (Suwon-si, KR); Minsu Seol (Suwon-si, KR); Minseok Yoo (Suwon-si, KR); Kyung-Eun Byun (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H10D30/6729H10D64/01H10D64/62H10B12/31H10B53/30H10B61/22H10B63/30H10D62/80
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Quick Facts
Patent No.
US 12,751,046
App. No.
18/152,976
Granted
Sep 29, 2026
Kind
B2
Abstract

A semiconductor device may include a two-dimensional material layer, one or more metal islands on the two-dimensional material layer, and a metal layer covering the metal islands on the two-dimensional material layer. The semiconductor device may be manufactured by a method including forming metal islands on a two-dimensional material layer using a redox method and forming a metal layer covering the metal islands on the two-dimensional material layer.

Claims (34)

1 . A semiconductor device comprising:

a two-dimensional material layer;

a plurality of metal islands spaced apart from each other on the two-dimensional material layer; and

a metal layer covering the plurality of metal islands on the two-dimensional material layer and being in contact with the two-dimensional material layer, wherein the plurality of metal islands and the metal layer include different metals from each other.

2 . The semiconductor device of claim 1 , wherein a thickness of the metal layer is greater than a thickness of the plurality of metal islands.

3 . The semiconductor device of claim 1 , wherein a thickness of the metal layer is three or more times a thickness of the plurality of metal islands.

4 . The semiconductor device of claim 1 , wherein a metal included in at least one of the plurality of metal islands and the metal layer includes a transition metal.

5 . The semiconductor device of claim 1 , wherein the plurality of metal islands include palladium.

6 . The semiconductor device of claim 1 , wherein the metal layer includes at least one of gold, silver, copper, platinum, palladium, nickel, chromium, and cobalt.

7 . The semiconductor device of claim 1 , wherein the metal layer further includes at least one of a non-metal material and a semi-metal.

8 . The semiconductor device of claim 7 , wherein a ratio of the non-metal material or the semi-metal with respect to the metal layer is greater than 0 at % and less than or equal to 25 at %.

9 . The semiconductor device of claim 7 , wherein the metal layer further includes at least one of boron and phosphorus.

10 . The semiconductor device of claim 1 , wherein the two-dimensional material layer includes a transition metal dichalcogenide (TMD).

11 . The semiconductor device of claim 10 , wherein

the TMD includes a metal element and a chalcogen element,

the metal element includes one of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Tc, Re, Cu, Ga, In, Sn, Ge and Pb, and

the chalcogen element includes one of S, Se and Te.

12 . The semiconductor device of claim 1 , wherein

the plurality of metal islands are metal particles, and

at least two of the plurality of metal islands are separated from each other.

13 . The semiconductor device of claim 1 , wherein

a content of the plurality of metal islands with respect to the metal layer is greater than or equal to 0.01 at % and less than or equal to 15 at %.

14 . The semiconductor device of claim 1 , wherein

the plurality of metal islands form a catalyst layer having a thickness of 10 nm or less.

15 . The semiconductor device of claim 1 , wherein

the plurality of metal islands are directly on the two-dimensional material layer,

the metal layer directly covers the plurality of metal islands, and

the plurality of metal islands are configured to reduce a number of defects in the two-dimensional material layer.

16 . A transistor comprising:

a two-dimensional material layer as a channel layer;

a plurality of metal islands spaced apart from each other on the two-dimensional material layer;

a metal layer covering the plurality of metal islands on the two-dimensional material layer and being in contact with the two-dimensional material layer,

wherein the plurality of metal islands and the metal layer include different metals from each other, and

the plurality of metal islands and the metal layer are a source electrode or a drain electrode of the transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2023
From: YOON, DUSEOP; KWON, JUNYOUNG; SEOL, MINSU; YOO, MINSEOK; BYUN, KYUNG-EUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 062403/0831 →
Priority Claims (1)
KR 10-2022-0086543 · Jul 13, 2022 · national
Continuity (1)
Related Publication 20240021683A1 · Jan 18, 2024
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