Programmable resistive memory element and a method of making the same
A programmable resistive memory element and a method of adjusting a resistance of a programmable resistive memory element are provided. The programmable resistive memory element includes at least one resistive memory element. Each resistive memory element includes an Indium-Gallium-Zinc-Oxide (IGZO) resistive layer, a first electrical contact and a second electrical contact. The first and second electrical contacts are disposed on the IGZO resistive layer in the same plane. The programmable resistive memory element includes a voltage generator coupled to the first and second electrical contacts, constructed and arranged to apply a thermal treatment to the resistive memory element to adjust a resistance of the resistive memory element.
1. A programmable resistive memory element with multiple resistance states, comprising:
a resistive layer;
a first electrical contact and a second electrical contact disposed on the resistive layer; and
a voltage generator coupled to the first and second electrical contacts, constructed and arranged to apply a thermal treatment to the resistive memory layer to adjust a resistance of the resistive memory layer.
2. The programmable resistive memory element of claim 1 , wherein the thermal treatment is performed by applying one or more voltage sweeps to the resistive layer with an upper voltage limit.
3. The programmable resistive memory element of claim 2 , wherein the upper voltage limit is set within a range between a few volts to a few tens of volts.
4. The programmable resistive memory element of claim 2 , wherein the upper voltage limit is set based on a desired resistance state for the resistive memory element.
5. The programmable resistive memory element of claim 1 , wherein the resistive memory element operates as a read-only programmable memory after the resistance is adjusted from a lower resistance state to one or more higher resistance states by applying the thermal treatment to make the resistance irreversible.
6. The programmable resistive memory element of claim 4 , wherein a current flowing through the resistive layer biased with a low voltage is measured to read a resistance value associated with each of the one or more higher resistance states of the resistive memory element.
7. The programmable resistive memory element of claim 1 , wherein the first electrical contact and the second electrical contact are apart from each other.
8. The programmable resistive memory element of claim 1 , wherein the first and second electrical contacts are made of at least one of Ti/Au, Al, Mo, indium tin oxide (ITO), aluminum zinc oxide (AZO), or any combination thereof.
9. The programmable resistive memory element of claim 2 , further comprising a dielectric layer disposed between the resistive layer and a substrate.
10. The programmable resistive memory element of claim 9 , wherein the dielectric layer is made of at least one of SiO2, Al2O3, AlN, or any combination thereof.