IP Library › Granted Patent US 12,374,379
Granted Patent B2
US 12,374,379 · App. 18/358,463 · Granted Jul 29, 2025

Temperature dependent refresh read rate

Inventors: Yanzhen Wang (Fremont, CA); Mahdi Ganji (San Jose, CA); Yanjie Wang (San Jose, CA)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G11C11/40626G11C11/40615G11C11/4076
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,374,379
App. No.
18/358,463
Filed
Jul 25, 2023
Granted
Jul 29, 2025
Kind
B2
Examiner
YANG, HAN
Art Unit
2824
USPC
365/222
Abstract

Systems and methods for effecting a temperature dependent refresh read rate of a read operation of a block or sub-block of memory cells in a NAND string. The method includes initiating a refresh read cycle, determining a current temperature of the non-volatile memory device, and determining a refresh read rate corresponding to the current temperature. The refresh read is performed. The method further includes implementing a delay of a defined time period after the refresh read is performed, wherein the defined time period is based on the determined refresh read rate. If a new command is received before the delay has ended then the new command is performed, and if the delay has ended without a new command having been received then the method returns to the step of determining the current temperature.

Claims (60)

1. A method for performing a refresh read in a non-volatile memory device, comprising:

initiating a refresh read cycle;

determining a current temperature of the non-volatile memory device;

determining a refresh read rate corresponding to the current temperature;

performing the refresh read;

implementing a delay of a defined time period after the refresh read is performed, wherein the defined time period is based on the determined refresh read rate;

when a new command is received before the delay has ended then perform the new command; and

when the delay has ended without a new command having been received then return to the step of determining the current temperature.

2. The method of claim 1 , wherein the step of determining the current temperature includes:

acquiring a temperature code from the non-volatile memory device;

relating the temperature code to a corresponding temperature using a first table stored in a memory of the non-volatile memory device, the first table relating a plurality of temperature codes to respective corresponding temperatures; and

identifying the corresponding temperature as the current temperature.

3. The method of claim 1 , wherein the step of determining the refresh read rate corresponding to the current temperature includes:

acquiring a temperature code from the non-volatile memory device that corresponds to the current temperature;

relating the temperature code to a corresponding refresh read rate using a second table stored in a memory of the non-volatile memory device, the second table relating a plurality of temperature codes to respective corresponding refresh read rates; and

identifying the corresponding refresh read rate as the refresh read rate.

4. The method of claim 1 , wherein the refresh read rate is faster as the current temperature increases and the refresh read rate is slower as the current temperature decreases.

5. The method of claim 1 , wherein the defined time period increases as the current temperature decreases and the defined time period decreases as the current temperature increases.

6. The method of claim 1 , wherein the step of determining a refresh read rate corresponding to the current temperature includes determining a point on a curve that plots a plurality of refresh rates vs. a plurality of corresponding temperatures.

7. The method of claim 1 , wherein the new command is a new read command.

8. A non-volatile memory device performing the method of claim 1 .

9. An apparatus, comprising:

a control circuit, configured to perform a refresh read in a non-volatile memory device, wherein to perform the refresh read, the control circuit is configured to perform the following operations:

initiate a refresh read cycle;

determine a current temperature of the non-volatile memory device;

determine a refresh read rate corresponding to the current temperature;

perform the refresh read;

implement a delay of a defined time period after the refresh read is performed, wherein the defined time period is based on the determined refresh read rate; and

when a new command is received before the delay has ended, perform the new command; and

when the delay has ended without a new command having been received, return to the operation of determining the current temperature.

10. The apparatus of claim 9 , wherein to determine the current temperature of the non-volatile memory device the control circuit is further configured to:

acquire a temperature code from the non-volatile memory device;

relate the temperature code to a corresponding temperature using a first table stored in a memory of the non-volatile memory device, the first table relating a plurality of temperature codes to respective corresponding temperatures; and

identify the corresponding temperature as the current temperature.

11. The apparatus of claim 9 , wherein to determine the refresh read rate corresponding to the current temperature, the control circuit is further configured to:

acquire a temperature code from the non-volatile memory device that corresponds to the current temperature;

relate the temperature code to a corresponding refresh read rate using a second table stored in a memory of the non-volatile memory device, the second table relating a plurality of temperature codes to respective corresponding refresh read rates; and

identify the corresponding refresh read rate as the refresh read rate.

12. The apparatus of claim 9 , wherein the refresh read rate is faster as the current temperature increases and the refresh read rate is slower as the current temperature decreases.

13. The apparatus of claim 9 , wherein the defined time period increases as the current temperature decreases and the defined time period decreases as the current temperature increases.

14. The apparatus of claim 9 , wherein to determine a refresh read rate corresponding to the current temperature, the control circuit is further configured to determine a point on a curve that plots a plurality of refresh rates vs. a plurality of corresponding temperatures.

15. The apparatus of claim 9 , wherein the new command is a new read command.

16. A non-transitory computer-readable storage medium comprising instructions executable by a processor, the instructions programming the processor to perform a refresh read in a non-volatile memory device; wherein to perform the refresh read, the instructions programming the processor to:

initiate a refresh read cycle;

determine a current temperature of the non-volatile memory device;

determine a refresh read rate corresponding to the current temperature;

perform the refresh read;

implement a delay of a defined time period after the refresh read is performed, wherein the defined time period is based on the determined refresh read rate;

when a new command is received before the delay has ended then perform the new command; and

when the delay has ended without a new command having been received then return to the step of determining the current temperature.

17. The non-transitory computer-readable storage medium of claim 16 , wherein the instruction of determining the current temperature includes further programming the processor to:

acquire a temperature code from the non-volatile memory device;

relate the temperature code to a corresponding temperature using a first table stored in a memory of the non-volatile memory device, the first table relating a plurality of temperature codes to respective corresponding temperatures; and

identify the corresponding temperature as the current temperature.

18. The non-transitory computer-readable storage medium of claim 16 wherein the instruction of determining the refresh read rate corresponding to the current temperature includes: further programming the processor to:

acquire a temperature code from the non-volatile memory device that corresponds to the current temperature;

relate the temperature code to a corresponding refresh read rate using a second table stored in a memory of the non-volatile memory device, the second table relating a plurality of temperature codes to respective corresponding refresh read rates; and

identify the corresponding refresh read rate as the refresh read rate.

19. The non-transitory computer-readable storage medium of claim 16 , wherein the refresh read rate is faster as the current temperature increases and the refresh read rate is slower as the current temperature decreases.

20. The non-transitory computer-readable storage medium of claim 16 , wherein the defined time period increases as the current temperature decreases and the defined time period decreases as the current temperature increases.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL Recorded Nov 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 065657/0158 →
PATENT COLLATERAL AGREEMENT- A&R Recorded Nov 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 065656/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2023
From: WANG, YANZHEN; GANJI, MAHDI; WANG, YANJIE
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 064557/0125 →
Continuity (2)
Provisional Application 63504404 · May 25, 2023
Related Publication 20240395308A1 · Nov 28, 2024
References Cited (8)
US 8656086B2 · Zimmermann · 2014 [cited by applicant]
US 8982653B2 · Nurminen · 2015 [cited by applicant]
US 10839886B2 · Yuan · 2020 [cited by applicant]
US 10990301B2 · Kim · 2021 [cited by applicant]
US 11056168B2 · Belcourt · 2021 [cited by applicant]
US 11404127B1 · Kumar · 2022 [cited by applicant]
US 20140185403A1 · Lai · 2014 [cited by examiner]
US 20140281311A1 · Walker · 2014 [cited by examiner]