Varied ball ball-grid-array (BGA) packages
Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
1 . An electronic system, comprising:
a first substrate;
a second substrate;
first solder balls coupling the first substrate to the second substrate, the first solder balls having a first total chemical composition comprising a metallic core surrounded by a solder, a first portion of the first solder balls aligned in a row proximate to a first edge of the second substrate, and a second portion of the first solder balls aligned in a row proximate to a second edge of the second substrate, the second opposite the first edge;
a third substrate; and
second solder balls coupling the second substrate to the third substrate, the second solder balls having a second total chemical composition different than the first total chemical composition of the first solder balls.
2 . The electronic system of claim 1 , wherein the metallic core comprises copper.
3 . The electronic system of claim 1 , wherein the second solder balls comprises a solder material different than the solder of the first solder balls.
4 . The electronic system of claim 1 , wherein the third substrate has a lateral width greater than a lateral width of the second substrate.
5 . The electronic system of claim 4 , wherein the lateral width of the second substrate is greater than a lateral width of the first substrate.
6 . The electronic system of claim 1 , wherein the second substrate has a lateral width greater than a lateral width of the first substrate.
7 . The electronic system of claim 1 , wherein the third substrate is a board.
8 . The electronic system of claim 7 , wherein the second substrate is a package substrate.
9 . The electronic system of claim 1 , wherein the second substrate is a package substrate.
10 . The electronic system of claim 1 , further comprising:
third solder balls coupling the first substrate to the second substrate, the third solder balls having a third total chemical composition different than the first total chemical composition; and
fourth solder balls coupling the second substrate to the third substrate, the fourth solder balls having a fourth total chemical composition different than the third total chemical composition.
11 . An electronic system, comprising:
a first substrate;
a second substrate;
first solder balls coupling the first substrate to the second substrate, the first solder balls having a first total chemical composition;
a third substrate; and
second solder balls coupling the second substrate to the third substrate, the second solder balls having a second total chemical composition different than the first total chemical composition of the first solder balls, and the second solder balls comprising a metallic core surrounded by a solder, a first portion of the first solder balls aligned in a row proximate to a first edge of the second substrate, and a second portion of the first solder balls aligned in a row proximate to a second edge of the second substrate, the second opposite the first edge.
12 . The electronic system of claim 11 , wherein the metallic core comprises copper.
13 . The electronic system of claim 11 , wherein the first solder balls comprises a solder material different than the solder of the second solder balls.
14 . The electronic system of claim 11 , wherein the third substrate has a lateral width greater than a lateral width of the second substrate.
15 . The electronic system of claim 14 , wherein the lateral width of the second substrate is greater than a lateral width of the first substrate.
16 . The electronic system of claim 11 , wherein the second substrate has a lateral width greater than a lateral width of the first substrate.
17 . The electronic system of claim 11 , wherein the second substrate is a package substrate.
18 . The electronic system of claim 11 , wherein the first substrate is a semiconductor die.
19 . The electronic system of claim 18 , wherein the second substrate is a package substrate.
20 . The electronic system of claim 11 , further comprising:
third solder balls coupling the first substrate to the second substrate, the third solder balls having a third total chemical composition different than the first total chemical composition; and
fourth solder balls coupling the second substrate to the third substrate, the fourth solder balls having a fourth total chemical composition different than the third total chemical composition.
21 . A package comprising:
a first substrate;
a second substrate;
an array of interconnects between the first substrate and the second substrate, the array of interconnects including a plurality of first interconnects and a plurality of second interconnects, each of the first interconnects including a first solder comprising tin, and each of the second interconnects comprising a copper core and a second solder surrounding the copper core, the second solder comprising tin, wherein each of the plurality of first interconnects has a first total chemical composition, and each of the plurality of second interconnects has a second total chemical composition different than the first total chemical composition; and
wherein the array of interconnects includes corner regions and a middle, at least one of the second interconnects located in one of the corner regions and at least one of the first interconnects located in the middle.
22 . The package of claim 21 , wherein the copper core has a diameter of 250 um or less.
23 . The package of claim 21 , wherein a thickness of the second solder surrounding the copper core is approximately 1 um or greater.
24 . The package of claim 21 , wherein the array includes a perimeter and a portion of the perimeter comprises some of the second interconnects.
25 . The package of claim 21 , wherein the first solder further comprises at least one of silver and copper.
26 . The package of claim 21 , wherein the second solder further comprises at least one of bismuth, indium, silver, and copper.
27 . The package of claim 21 , wherein a material composition of the first solder is different than a material composition of the second solder.
28 . The package of claim 22 , wherein a height between the first substrate and the second substrate is equal to or greater than the diameter of the copper core.
29 . The package of claim 21 , wherein at least one of the second interconnects extends from the first substrate to the second substrate.
30 . The package of claim 29 , further comprising:
a first pad on the first substrate; and
a second pad on the second substrate; and
wherein one of the second interconnects is coupled with the first pad and the second pad.
31 . The package of claim 29 , wherein each of the first interconnects extends from the first substrate to the second substrate.
32 . The package of claim 21 , wherein a number of the first interconnects is greater than a number of second interconnects.
33 . The package of claim 21 , further comprising a semiconductor die over the second substrate.
34 . A packaging, comprising:
a first substrate;
a second substrate;
an array of interconnects between the first substrate and the second substrate, the array of interconnects including a first interconnect, a second interconnect, a third interconnect, and a fourth interconnect, wherein each of the first interconnect and the second interconnect includes a first solder, and each of the third interconnect and the fourth interconnect includes a copper core having a diameter of 250 um or less, and a second solder surrounding the copper core, the second solder having a thickness approximately 1 um or greater, wherein each of the first interconnect and the second interconnect has a first total chemical composition, and each of the third interconnect and the fourth interconnect has a second total chemical composition different than the first total chemical composition; and
wherein at least one of the third interconnect and the fourth interconnect is located at a perimeter of the array of interconnects, wherein at least one of the first interconnect and the second interconnect is located at a middle of the array of interconnects, and wherein at least one of the third interconnect and the fourth interconnect is located at a corner region of the array of interconnects.
35 . The package of claim 34 , wherein the first solder comprises tin and the second solder comprises tin.
36 . The package of claim 35 , wherein the first solder further comprises at least one of silver and copper.
37 . The package of claim 35 , wherein the second solder further comprises at least one of bismuth, indium, silver, and copper.
38 . The package of claim 35 , wherein a material composition of the first solder is different than a material composition of the second solder.
39 . The package of claim 34 , wherein a height between the first substrate and the second substrate is at least the diameter of the copper core.
40 . The package of claim 34 , wherein each of the third interconnect and the fourth interconnect extends from the first substrate to the second substrate.
41 . The package of claim 40 , further comprising:
a first pad on the first substrate; and
a second pad on the second substrate; and
wherein one of the third interconnect and the fourth interconnect is coupled with the first pad and the second pad.
42 . The package of claim 40 , wherein each of the first interconnect and the second interconnect extends from the first substrate to the second substrate.
43 . The package of claim 34 , wherein each of the first interconnect and the second interconnect have a first volume, and each of the third interconnect and the fourth interconnect have a second volume, the second volume different than the first volume.
44 . The package of claim 34 , further comprising a semiconductor die over the second substrate.
45 . A packaging, comprising:
a first substrate;
a second substrate;
an array of interconnects between the first substrate and the second substrate, the array of interconnects including a plurality of first interconnects and a plurality of second interconnects, each of the first interconnects including tin, and each of the second interconnects comprising a copper core having a diameter of 250 um or less, and tin surrounding the copper core, wherein each of the plurality of first interconnects has a first total chemical composition, and each of the plurality of second interconnects has a second total chemical composition different than the first total chemical composition; and
wherein a height between the first substrate and the second substrate is at least the diameter of the copper core, wherein the array comprises:
a corner region, wherein at least one of the second interconnects is located in the corner region; and
a middle, wherein at least one of the first interconnects is located in the middle.
46 . The package of claim 45 , wherein a thickness of the tin surrounding the copper core is approximately 1 um or greater.
47 . The package of claim 45 , further comprising a semiconductor die over the second substrate.
48 . The package of claim 45 , further comprising:
a first pad on the first substrate; and
a second pad on the second substrate; and
wherein one of the second interconnects is coupled with the first pad and the second pad.
49 . The package of claim 45 , wherein each of the first interconnects extends from the first substrate to the second substrate.
50 . The package of claim 45 , wherein the array further comprises:
a periphery, wherein at least one of the second interconnects is located on the perimeter.