Granted Patent
B2
US 12,369,501 · App. 18/435,070 · Granted Jul 22, 2025
Systems and methods for fabrication of superconducting integrated circuits
Inventors:
Eric Ladizinsky (Manhattan Beach, CA); Jeremy P. Hilton (Vancouver, CA); Byong Hyop Oh (San Jose, CA); Paul I. Bunyk (Pt. Roberts, WA)
Assignee:
1372934 B.C. LTD.
H10N60/0912B82Y10/00H01L21/2855H01L21/76877H01L21/76891H10N60/01H10N60/0156H10N60/10H10N60/12H10N60/805H10N60/855H10N69/00G06N10/00
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Abstract
Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.
Claims (17)
1. A method of depositing a superconducting metal layer in an integrated circuit, the method comprising:
depositing a first portion of the superconducting metal layer to overlie a top layer of one or more Josephson junction trilayers of the integrated circuit;
stopping the depositing of the first portion of the superconducting metal layer to prevent excessive heating;
cooling the first portion of the superconducting metal layer; and
depositing a second portion of the superconducting metal layer over the first portion of the superconducting metal layer.
2. The method of claim 1 , further comprising:
stopping the depositing of the second portion of the superconducting metal layer to prevent excessive heating;
cooling the second portion of the superconducting metal layer; and
depositing a third portion of the superconducting metal layer over the second portion of the superconducting metal layer.
3. The method of claim 1 , wherein depositing a first portion of the superconducting metal layer comprises depositing one of niobium or aluminum.
4. The method of claim 1 , further comprising:
monitoring a temperature of the integrated circuit during the depositing of the first portion of the superconducting metal layer, and wherein stopping the depositing of the first portion of the superconducting metal layer to prevent excessive heating comprises stopping the depositing of the first portion of the superconducting metal layer in response to the temperature of the integrated circuit approaching or exceeding a defined threshold temperature.
5. The method of claim 1 , wherein stopping the depositing of the first portion of the superconducting metal layer to prevent excessive heating comprises stopping the depositing of the first portion of the superconducting metal layer after a target deposition time.
6. The method of claim 1 , wherein cooling the first portion of the superconducting metal layer comprises passively cooling the first portion of the superconducting metal layer for a defined cooling time.
7. The method of claim 1 , wherein cooling the first portion of the superconducting metal layer comprises filling a deposition chamber with an inert gas.
8. The method of claim 1 , wherein depositing a second portion of the superconducting metal layer comprises depositing the second portion of the superconducting metal layer until a defined total metal layer thickness is deposited.
9. The method of claim 1 , wherein depositing a second portion of the superconducting metal layer comprises depositing the second portion of the superconducting metal layer until a threshold temperature is reached.
Assignments (6)
CHANGE OF NAME
Recorded Jun 24, 2025
From: DWSI HOLDINGS INC.
To: D-WAVE SYSTEMS INC.
Reel/Frame 071508/0011 →
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Jun 24, 2025
From: 1372929 B.C. LTD.
To: 1372934 B.C. LTD.
Reel/Frame 071705/0119 →
CONTINUATION
Recorded Jun 24, 2025
From: D-WAVE SYSTEMS INC.
To: D-WAVE SYSTEMS INC.
Reel/Frame 071723/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Jun 24, 2025
From: D-WAVE SYSTEMS INC.
To: 1372929 B.C. LTD.
Reel/Frame 071723/0408 →
MERGER
Recorded Jun 24, 2025
From: D-WAVE SYSTEMS INC.; DWSI HOLDINGS INC.
To: DWSI HOLDINGS INC.
Reel/Frame 071724/0052 →
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Apr 23, 2024
From: LADIZINSKY, ERIC; HILTON, JEREMY P.; OH, BYONG HYOP; BUNYK, PAUL I.
To: D-WAVE SYSTEMS INC.
Reel/Frame 067198/0192 →
Continuity (6)
Division
14383837
Provisional Application
61608379
· Mar 8, 2012
Provisional Application
61714642
· Oct 16, 2012
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