IP Library › Granted Patent US 12,557,221
Granted Patent B2
US 12,557,221 · App. 18/518,377 · Granted Feb 17, 2026

Molded packages with through-mold interconnects

Inventors: Zhiwei Gong (Chandler, AZ); Lakshminarayan Viswanathan (Chandler, AZ); Li Li (Scottsdale, AZ)
Assignee: NXP USA, INC.
H05K1/185H05K1/181H05K3/0017H05K2201/2018H05K2203/0415H05K2203/176
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Quick Facts
Patent No.
US 12,557,221
App. No.
18/518,377
Granted
Feb 17, 2026
Kind
B2
Abstract

Molded device packages which allow electrical contacts to coupled to a first surface of a circuit substrate such as a printed circuit board while allowing the opposite surface to remain exposed for other purposes such as bonding thermal structures such as heatsinks include electrically-conductive pillars which are bonded to the first surface of the substrate and encapsulated in molding material. The molding material can one or more cavities over disposed over the first surface of the substrate which can be evacuated or gas-filled. The electrically-conductive pillars protrude from connected manifold and are joined to each other by a frame portion of the manifold. The manifold is patterned with a masking material that protects the pillars from being etched during a selective etching process which removes the frame portion of the manifold to separate the electrically-conductive pillars from each other.

Claims (57)

1 . A method of forming a device package, the method comprising:

providing an electrically conductive manifold that includes a frame structure that defines a plane and electrically conductive pillars that protrude from the frame structure in a direction perpendicular to the plane defined by the frame structure;

encapsulating the manifold in a volume of molding material and bonding the manifold to a first fir of a circuit substrate such that a surface of the manifold in the plane defined by the frame structure is an exposed surface disposed above the circuit substrate and surrounded by the volume of molding material; and

selectively removing material of the frame structure to separate the electrically conductive pillars from each other;

wherein one or more of the electrically conductive pillars is electrically coupled to an electronic component disposed on the circuit substrate:

wherein the manifold is formed from a first metallic material;

wherein the method further comprises a masking material patterned on the exposed surface of the manifold; and

wherein the method further comprises performing an etching process that preferentially removes the first metallic material compared to the masking material.

2 . The method of claim 1 ,

wherein depositing the masking material on the exposed surface of the manifold comprises covering a central portion of the frame structure above each conductive pillar and leaving peripheral portion of the frame structure above each conductive pillar exposed; and

wherein selectively removing the material of the frame structure forms a tenon-shaped metal structure that is exposed at a surface of the volume of molding material.

3 . The method of claim 1 ,

wherein one or more conductive pillars pass through the volume of molding material to contact an electronic component disposed on the first surface of the circuit substrate.

4 . The method of claim 1 ,

wherein one or more conductive pillars pass through a portion of the volume of molding material without contacting the first surface of the circuit substrate.

5 . The method of claim 1 ,

wherein one or more conductive pillars pass through a portion of the volume of molding material and are disposed above a first electronic component on the first surface of the circuit substrate without contacting the first electronic component.

6 . The method of claim 1 ,

wherein the circuit substrate includes a thermally conductive structure that passes through a thickness of the circuit substrate; and

wherein the thermally conductive structure is thermally coupled to a first electronic component on the first surface of the circuit substrate and is configured to transfer heat between the first electronic component and an external surface of the device package formed by a bottom surface of the circuit substrate.

7 . The method of claim 1 ,

wherein a first set of the conductive pillars is disposed along a periphery of the device package; and

wherein the device package includes a centrally-disposed conductive pillar that passes through the volume of molding material and is surrounded by the first set of the conductive pillars.

8 . The method of claim 7 ,

wherein the centrally-disposed conductive pillar is electrically coupled to one or more of the first set of the conductive pillars.

9 . A method of forming a device package, the method comprising:

providing an electrically conductive manifold that includes a frame structure that defines a plane and electrically conductive pillars that protrude from the frame structure in a direction perpendicular to the plane defined by the frame structure;

encapsulating the manifold in a volume of molding material and bonding the manifold to a first surface of a circuit substrate such that a surface of the manifold in the plane defined by the frame structure is an exposed surface disposed above the circuit substrate and surrounded by the volume of molding material; and

selectively removing material of the frame structure to separate the electrically conductive pillars from each other;

wherein one or more of the electrically conductive pillars is electrically coupled to an electronic component disposed on the circuit substrate:

forming a recessed area in the volume of molding material prior to bonding the manifold to the first surface of the circuit substrate;

wherein bonding the manifold to the first surface of the circuit substrate forms a hollow cavity between the first surface of the circuit substrate and the volume of molding material.

10 . The method of claim 9 ,

wherein one or more conductive pillars pass through the volume of molding material and the hollow cavity to contact the first surface of the circuit substrate.

11 . The method of claim 9 ,

wherein one or more conductive pillars pass through the volume of molding material and the hollow cavity to contact an electronic component disposed on the first surface of the circuit substrate.

12 . The method of claim 9 , wherein the hollow cavity is defined by the recessed area in the volume of molding material being disposed above the first surface of the circuit substrate.

13 . A method of forming a device package, the method comprising:

providing an electrically conductive manifold that includes a frame structure that defines a plane and electrically conductive pillars that protrude from the frame structure in a direction perpendicular to the plane defined by the frame structure;

encapsulating the manifold in a volume of molding material and bonding the manifold to a first surface of a circuit substrate such that a surface of the manifold in the plane defined by the frame structure is an exposed surface disposed above the circuit substrate and surrounded by the volume of molding material; and

selectively removing material of the frame structure to separate the electrically conductive pillars from each other;

wherein the device package includes a cavity disposed between the volume of molding material and the first surface of the circuit substrate; and

wherein one or more of the electrically conductive pillars are electrically coupled to electronic components disposed on the circuit substrate; and

wherein the manifold is encapsulated prior to bonding the manifold to the first surface of the circuit substrate.

14 . The method of claim 13 , wherein encapsulating the manifold in the volume of molding material comprises:

encapsulating a peripheral portion of the manifold that includes a first set of the electrically conductive pillars such that the volume of molding material extends to a first distance beyond a top surface of the manifold in the direction perpendicular to the plane defined by the frame structure; and

encapsulating a central portion of the manifold that is surrounded by the peripheral portion of the manifold such that the volume of molding material extends to a second distance that is less that the first distance beyond the top surface of the manifold in the direction perpendicular to the plane defined by the frame structure.

15 . The method of claim 13 , wherein one or more electronic components are disposed within the cavity on the first surface of the circuit substrate.

16 . The method of claim 13 ,

wherein a first set of the conductive pillars is disposed along a periphery of the device package surrounding the cavity; and

wherein the device package includes a centrally-disposed conductive pillar that passes through the volume of molding material and is surrounded by the first set of the conductive pillars.

17 . The method of claim 16 ,

wherein the centrally-disposed conductive pillar is electrically coupled to one or more of the first set of the conductive pillars.

18 . The method of claim 16 ,

wherein the centrally-disposed conductive pillar passes through the cavity and contacts an electronic component disposed on the top surface of the circuit substrate.

19 . The method of claim 18 ,

wherein the centrally-disposed conductive pillar passes electrically couples the electronic component one of the first set of the conductive pillars.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2023
From: GONG, ZHIWEI; VISWANATHAN, LAKSHMINARAYAN; LI, LI
To: NXP USA, INC.
Reel/Frame 065670/0256 →
Continuity (1)
Related Publication 20250168987A1 · May 22, 2025
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