Granted Patent B2

US 12,725,664 · App. 18/584,636 · Granted Sep 1, 2026

Inventors: Wei Li (Shanghai, CN); Jiacen Guo (Sunnyvale, CA); Weiyi Li (Fremont, CA); Yichen Wang (Shanghai, CN); Xiang Yang (Santa Clara, CA); Liang Li (Shanghai, CN); Ming Wang (Shanghai, CN)

Assignee: Sandisk Technologies, Inc.

G11C16/3459G11C16/0433G11C16/28

Abstract

Claims (69)

1 . An apparatus comprising:

a communication interface configured to receive memory commands for accessing a three-dimensional memory structure having blocks, each block having NAND strings and word lines connected to the NAND strings; and

one or more control circuits coupled to the communication interface, the one or more control circuits configured to connect to the three-dimensional memory structure, the one or more control circuits configured to:

operate the memory structure in a sub-block mode in which sub-blocks of a block are erased and programmed independently, wherein sub-blocks are a unit of erase;

determine a magnitude for a program verify voltage for a selected word line in a selected sub-block in a selected block during a program verify in the sub-block mode, the magnitude for the program verify voltage depends on a number of the word lines that are programmed in one or more unselected sub-blocks in the selected block when the program verify voltage is applied to the selected word line;

apply the program verify voltage having the magnitude that depends on the number of the word lines programmed in the one or more unselected sub-blocks to the selected word line during the sub-block mode, wherein during the program verify the number of programmed word lines in the one or more unselected sub-blocks in the selected block is in one of a plurality of non-overlapping programmed word line ranges;

sense selected memory cells connected to the selected word line in response to application of the program verify voltage to the selected word line;

read the selected memory cells connected to the selected word line after the selected memory cells have passed the program verify, wherein during the read the number of programmed word lines in the one or more unselected sub-blocks in the selected block is in one of the plurality of non-overlapping programmed word line ranges, including:

apply a first voltage gap between the program verify voltage and a read reference voltage during the sub-block mode when the number of programmed word lines in the one or more unselected sub-blocks in the selected block is within the same range of the plurality of non-overlapping programmed word line ranges during both the program verify and the read of the selected word line, the program verify voltage being a voltage for verifying a first data state, and the read reference voltage being a voltage for reading the first data state; and

apply a second voltage gap different from the first voltage gap between the program verify voltage and the read reference voltage during the sub-block mode when the number of programmed word lines in the one or more unselected sub-blocks in the selected block is in a different range of the plurality of non-overlapping programmed word line ranges during the read of the selected word line than during the program verify of the selected word line, including apply a smaller voltage gap than the first voltage gap between the program verify voltage and the read reference voltage responsive to the number of programmed word lines in the one or more unselected sub-blocks in the selected block being in a first range of the plurality of non-overlapping programmed word line ranges during the program verify and a second range of the plurality of non-overlapping programmed word line ranges during the read of the selected word line, wherein the second range has more programmed word lines than the first range.

2 . The apparatus of claim 1 , wherein the one or more control circuits are further configured to:

establish the program verify voltage to have a first magnitude responsive to a percentage of programmed word lines in the one or more unselected sub-blocks being below a first percentage; and

establish the program verify voltage to have a second magnitude responsive to the percentage of programmed word lines in the one or more unselected sub-blocks being above a second percentage that is at least as high as the first percentage, the second magnitude being greater than the first magnitude.

3 . The apparatus of claim 1 , wherein the one or more control circuits are further configured to:

establish the program verify voltage to have a first magnitude responsive to the one or more unselected sub-blocks being open when the program verify voltage is to be applied to the selected word line; and

establish the program verify voltage to have a second magnitude responsive to the one or more unselected sub-blocks being closed when the program verify voltage is to be applied to the selected word line, the second magnitude being greater than the first magnitude.

4 . The apparatus of claim 1 , wherein the one or more control circuits are further configured to:

apply a larger voltage gap than the first voltage gap between the program verify voltage and the read reference voltage responsive to the number of programmed word lines in the one or more unselected sub-blocks in the selected block being in a third range of the plurality of non-overlapping programmed word line ranges during the program verify and a fourth range of the plurality of non-overlapping programmed word line ranges during the read of the selected word line, wherein the fourth range has fewer programmed word lines than the third range.

5 . The apparatus of claim 1 , wherein the one or more control circuits are further configured to:

determine a magnitude for the read reference voltage for the selected word line in the selected sub-block in the selected block, the magnitude for the read reference voltage depends on a programmed status of the word lines in the one or more unselected sub-blocks in the selected block when the selected word line is program verified and a programmed status of the word lines in the one or more unselected sub-blocks in the selected block when the read reference voltage is applied to the selected word line;

apply the read reference voltage having the magnitude that depends on the programmed status of the word lines in the one or more unselected sub-blocks in the selected block when the selected word line is program verified and the programmed status of the word lines in the one or more unselected sub-blocks in the selected block to the selected word line during the sub-block mode; and

determine whether the selected memory cells connected to the selected word line have a threshold voltage of at least the first data state in response to application of the read reference voltage.

6 . The apparatus of claim 5 , wherein the one or more control circuits are further configured to:

establish the read reference voltage to have a first magnitude responsive to the one or more unselected sub-blocks being open when the read reference voltage is to be applied to the selected word line whether the one or more unselected sub-blocks were open or closed during the program verify of the selected word line; and

establish the read reference voltage to have a second magnitude responsive to the one or more unselected sub-blocks being closed when the read reference voltage is to be applied to the selected word line whether the one or more unselected sub-blocks were open or closed during the program verify of the selected word line, the second magnitude being greater than the first magnitude.

7 . The apparatus of claim 5 , wherein the one or more control circuits are further configured to:

establish the read reference voltage to have a first magnitude responsive to a number of unprogrammed word lines in the one or more unselected sub-blocks being below a particular percentage when the read reference voltage is to be applied to the selected word line; and

establish the read reference voltage to have a second magnitude responsive to the number of unprogrammed word lines in the one or more unselected sub-blocks being above the particular percentage when the read reference voltage is to be applied to the selected word line, the second magnitude being greater than the first magnitude.

8 . The apparatus of claim 1 , wherein:

the selected block comprises a first sub-block containing a first set of contiguous word lines including the selected word line, the first sub-block being the selected sub-block in the selected block;

the selected block comprises a second sub-block containing a second set of contiguous word lines, the second sub-block being an unselected sub-block of the one or more unselected sub-blocks in the selected block; and

the one or more control circuits are further configured to:

establish the program verify voltage to have a first magnitude responsive to the second sub-block having less than or equal to a first percentage of word lines programmed when applying the program verify voltage to the selected word line;

establish the program verify voltage to have a second magnitude responsive to the second sub-block having more than the first percentage of word lines programmed but less than or equal to a second percentage of word lines programmed when applying the program verify voltage to the selected word line; and

establish the program verify voltage to have a third magnitude responsive to the second sub-block having more than the second percentage of word lines programmed but less than or equal to a third percentage of word lines programmed when applying the program verify voltage to the selected word line;

the first percentage is less than the second percentage;

the second percentage is less than the third percentage;

the first magnitude is less than the second magnitude; and

the second magnitude is less than the third magnitude.

9 . The apparatus of claim 1 , wherein:

the selected block comprises a first sub-block containing a first set of contiguous word lines including the selected word line, the first sub-block being the selected sub-block in the selected block;

the selected block comprises a second sub-block containing a second set of contiguous word lines, the second sub-block being a first unselected sub-block of the one or more unselected sub-blocks in the selected block;

the selected block comprises a third sub-block containing a third set of contiguous word lines, the third sub-block being a second unselected sub-block of the one or more unselected sub-blocks in the selected block; and

the one or more control circuits are further configured to:

establish the program verify voltage to have a first magnitude responsive a word line programmed status in the second sub-block and the third sub-block meeting a first fullness criterion; and

establish the program verify voltage to have a second magnitude responsive the word line programmed status in the second sub-block and the third sub-block meeting a second fullness criterion, the second fullness criterion having more word lines programmed than the first fullness criterion, the second magnitude being greater than the first magnitude.

10 . A method for operating a memory system, the method comprising:

determining a first degree of programming in an unselected sub-block of a block, the block comprising a plurality of NAND strings and word lines, the block comprising the unselected sub-block and a selected sub-block, the selected sub-block comprising a first set of contiguous word lines, the unselected sub-block comprising a second set of contiguous word lines;

applying a program verify voltage to a selected word line in the selected sub-block, the program verify voltage having a magnitude that depends on the first degree of programming in the unselected sub-block, the selected word line connected to selected memory cells; and

determining results of verifying the selected memory cells in response to application of the program verify voltage;

determining a second degree of programming in the unselected sub-block of the block prior to a read while the selected memory cells connected to the selected word line still store data verified with the program verify voltage having the magnitude that depended on the first degree of programming in the unselected sub-block at a time of program verify, the program verify voltage being used to verify a first data state;

applying a read reference voltage to the selected word line, the read reference voltage having a magnitude that depends on the second degree of programming in the unselected sub-block when applying the read reference voltage to the selected word line, the read reference voltage being used to read the first data state; and

sensing the selected memory cells in response to application of the read reference voltage.

11 . The method of claim 10 , further comprising:

establishing the magnitude of the program verify voltage to be a first voltage responsive to a number of programmed word lines in the unselected sub-block being below a particular percentage; and

establishing the magnitude of the program verify voltage to be a second voltage responsive to the number of programmed word lines in the unselected sub-block being above the particular percentage, the second voltage being greater than the first voltage.

12 . The method of claim 10 , further comprising:

establishing the magnitude of the program verify voltage to be a first voltage responsive to the unselected sub-block being open; and

establishing the magnitude of the program verify voltage to be a second voltage responsive to the unselected sub-block being closed, the second voltage being greater than the first voltage.

13 . A non-volatile storage device, comprising:

a three-dimensional memory structure having blocks, each block having NAND strings and word lines connected to the NAND strings; and

one or more control circuits in communication with the three-dimensional memory, the one or more control circuits configured to:

operate the memory structure in a sub-block mode in which sub-blocks of a block are erased and programmed independently, each sub-block being a unit of erase;

determine a magnitude for a program verify voltage for a selected word line in a selected sub-block in a selected block during the sub-block mode, the magnitude for the program verify voltage depends on a first degree of programming of the word lines in one or more unselected sub-blocks in the selected block when the program verify voltage is applied to the selected word line;

apply the program verify voltage having the magnitude that depends on the first degree of programming of the word lines in the one or more unselected sub-blocks to the selected word line during the sub-block mode;

sense selected memory cells connected to the selected word line in response to application of the program verify voltage to the selected word line;

determine a second degree of programming in the one or more unselected sub-blocks of the selected block prior to a read while the selected memory cells connected to the selected word line still store data verified with the program verify voltage having the magnitude that depended on the first degree of programming in the one or more unselected sub-blocks at a time of program verify, the program verify voltage being used to verify a first data state;

apply a read reference voltage to the selected word line, the read reference voltage having a magnitude that depends on the second degree of programming in the one or more unselected sub-blocks when applying the read reference voltage to the selected word line, the read reference voltage being used to read the first data state; and

sense the selected memory cells in response to application of the read reference voltage.

Assignments (4)

Continuity (1)

References Cited (23)