IP Library Granted Patent US 12,382,706
Granted Patent B2
US 12,382,706 · App. 18/622,659 · Granted Aug 5, 2025

Self-aligned gate endcap (SAGE) architectures with gate-all-around devices

Inventors: Biswajeet Guha (Hillsboro, OR); William Hsu (Portland, OR); Leonard P. Guler (Hillsboro, OR); Dax M. Crum (Beaverton, OR); Tahir Ghani (Portland, OR)
Assignee: Intel Corporation
H10D30/6217H01L21/02603H01L23/5226H10D30/6735H10D62/115H10D62/119H10D62/151H10D84/0151H10D84/038H10D30/6219
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Quick Facts
Patent No.
US 12,382,706
App. No.
18/622,659
Granted
Aug 5, 2025
Kind
B2
Abstract

Self-aligned gate endcap (SAGE) architectures with gate-all-around devices, and methods of fabricating self-aligned gate endcap (SAGE) architectures with gate-all-around devices, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate and having a length in a first direction. A nanowire is over the semiconductor fin. A gate structure is over the nanowire and the semiconductor fin, the gate structure having a first end opposite a second end in a second direction, orthogonal to the first direction. A pair of gate endcap isolation structures is included, where a first of the pair of gate endcap isolation structures is spaced equally from a first side of the semiconductor fin as a second of the pair of gate endcap isolation structures is spaced from a second side of the semiconductor fin.

Claims (40)

1. An electronic device comprising:

a substrate;

a first fin extending from the substrate;

a second fin extending from the substrate, the first fin and the second fin defining a trench therebetween;

a trench isolation material at a base of the trench, the first fin extending farther away from the substrate than the trench isolation material extends away from the substrate, the second fin extending farther away from the substrate than the trench isolation material extends away from the substrate, the trench isolation material including silicon and oxygen;

an isolation wall between the first fin and the second fin, the isolation wall including carbon, silicon, and nitrogen, the isolation wall extending into the trench isolation material; and

a gate structure including at least one of aluminum, titanium, hafnium, oxygen, or nitrogen, the first fin to extend into a first opening in a first portion of the gate structure, the second fin to extend into a second opening in a second portion of the gate structure, the isolation wall extending between the first portion of the gate structure and the second portion of the gate structure, a first part of the first portion of the gate structure between the first fin and the isolation wall, a second part of the second portion of the gate structure between the second fin and the isolation wall, the first portion of the gate structure electrically coupled to the second portion of the gate structure over an end of the isolation wall, the end of the isolation wall distal to the substrate, a portion of the isolation wall closer to the substrate than the gate structure is to the substrate.

2. The electronic device as defined in claim 1 , wherein the isolation wall is a first isolation wall, and further including a second isolation wall, the second fin between the first isolation wall and the second isolation wall.

3. The electronic device as defined in claim 2 , wherein the gate structure is a first gate structure, and further including a second gate structure, the second isolation wall separating the first gate structure from the second gate structure.

4. The electronic device as defined in claim 2 , wherein the first isolation wall has a first width, and the second isolation wall has a second width that is greater than the first width.

5. The electronic device as defined in claim 1 , wherein the isolation wall includes a first side and a second side opposite the first side, the first side of the isolation wall faces at least a first portion of the first fin, and the second side of the isolation wall faces at least a second portion of the second fin.

6. The electronic device as defined in claim 1 , further including a gate interconnect electrically coupled to the gate structure, the gate interconnect including tungsten.

7. The electronic device as defined in claim 1 , wherein a distal end of the first fin is aligned with a distal end of the second fin.

8. The electronic device as defined in claim 1 , wherein the isolation wall extends parallel to an elongate length of the first fin.

9. A computing device comprising:

a substrate;

a first fin extending from the substrate;

a second fin extending from the substrate, the first fin and the second fin define a trench therebetween, the first fin having first tapered walls, the second fin having second tapered walls, the first fin having a greater degree of tapering along a first portion of the first fin than along a second portion of the first fin, the first portion of the first fin associated with a base of the first fin, the second portion of the first fin associated with a distal end of the first fin, the second fin having a greater degree of tapering along a first portion of the second fin than along a second portion of the second fin, the first portion of the second fin associated with a base of the second fin, the second portion of the second fin associated with a distal end of the first fin;

a trench isolation structure in the trench, the trench isolation structure separating the first portion of the first fin and the first portion of the second fin, the trench isolation structure adjacent the substrate;

a gate structure including a first portion and a second portion extending along a first side and a second side, respectively, of the second portion of the first fin, the gate structure including a third portion extending over the distal end of the first fin, the third portion of the gate structure connecting the first portion of the gate structure and the second portion of the gate structure, the gate structure including a fourth portion and a fifth portion extending along a first side and a second side, respectively, of the second portion of the second fin, the gate structure including a sixth portion extending over the distal end of the second fin, the sixth portion of the gate structure connecting the fourth portion of the gate structure and the fifth portion of the gate structure, the gate structure including at least one of aluminum or titanium; and

a wall between the first fin and the second fin, the trench isolation structure extending around an end of the wall, the wall including carbon, silicon, and nitrogen, the end of the wall spaced apart from the substrate with the trench isolation structure therebetween, a first side of the wall facing at least a portion of the first fin with the second portion of the gate structure therebetween, a second side of the wall facing at least a portion of the second fin with the fourth portion of the gate structure therebetween.

10. The computing device as defined in claim 9 , wherein the gate structure is a first gate structure, and the wall is a first wall, the computing device further including:

a second gate structure; and

a second wall, the first gate structure electrically isolated from the second gate structure by the second wall extending therebetween.

11. The computing device as defined in claim 10 , wherein the first wall has a first width, and the second wall has a second width that is greater than the first width.

12. The computing device as defined in claim 9 , wherein the end of the wall is a first end, the wall includes a second end opposite the first end, and the computing device includes an interconnect material extending over the second end of the wall, the third portion of the gate structure and the sixth portion of the gate structure electrically coupled along the interconnect material.

13. The computing device as defined in claim 12 , wherein the interconnect material includes tungsten.

14. The computing device as defined in claim 9 , wherein the distal end of the first fin is aligned with the distal end of the second fin.

15. The computing device as defined in claim 9 , wherein the wall extends parallel to an elongate length of the first fin.

16. The computing device as defined in claim 9 , further including a display.

17. An apparatus comprising:

a plurality of fins on a semiconductor substrate, the plurality of fins having opposing sidewalls that are tapered, an angle of tapering of the sidewalls greater adjacent bases of the plurality of fins than adjacent top surfaces of the plurality of fins;

a plurality of isolation walls at least partially interleaved with at least some of the plurality of fins, the plurality of isolation walls separated from the substrate by a trench isolation material, the trench isolation material between adjacent ones of the plurality of fins, the plurality of isolation walls including carbon, silicon, and nitrogen; and

a conductive material extending around the top surfaces and the opposing sidewalls of the plurality of fins, the plurality of isolation walls closer to the substrate than the conductive material is to the substrate, different portions of the conductive material corresponding to different gate electrodes of different transistors, the conductive material including at least one of aluminum or titanium, at least some of the plurality of isolation walls separating adjacent ones of the different gate electrodes, the conductive material of the different gate electrodes extending between adjacent ones of the plurality of isolation walls and corresponding ones of the plurality of fins, at least some of the different portions of the conductive material extending around different ones of the plurality of fins electrically coupled to other ones of the different portions of the conductive material extending around other ones of the plurality of fins along interconnects that extend over intervening ones of the plurality of isolation walls.

18. The apparatus as defined in claim 17 , wherein at least some of the different portions of the conductive material extending around different ones of the plurality of fins are electrically isolated from other ones of the different portions of the conductive material extending around other ones of the plurality of fins by intervening ones of the plurality of isolation walls.

19. The apparatus as defined in claim 17 , wherein different ones of the plurality of isolation walls have different widths.

20. The apparatus as defined in claim 17 , wherein the interconnects include tungsten.

21. The apparatus as defined in claim 17 , wherein the top surfaces of the plurality of fins are aligned.

22. The apparatus as defined in claim 17 , wherein the plurality of isolation walls extend parallel to the plurality of fins.

23. The apparatus as defined in claim 17 , further including a display.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2026
From: INTEL CORPORATION
To: INTEL FOUNDRY IP LLC
Reel/Frame 076064/0951 →
Continuity (4)
Continuation 18374959 · Sep 29, 2023
Continuation 17549827 · Dec 13, 2021
Continuation 16017966 · Jun 25, 2018
Related Publication 20240243203A1 · Jul 18, 2024
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