IP Library › Granted Patent US 12,446,258
Granted Patent B2
US 12,446,258 · App. 19/060,198 · Granted Oct 14, 2025

Thin film semiconductor switching device

Inventors: Douglas W. Barlage (Edmonton, CA); Lhing Gem Shoute (Edmonton, CA); Kenneth C. Cadien (Edmonton, CA); Alex Munnlick Ma (Edmonton, CA); Eric Wilson Milburn (Edmonton, CA)
Assignee: ZINITE CORPORATION
H10D30/6713H01L23/481H01L23/5286H01L23/552H01L25/0657H01L25/16H10D30/6728H10D30/6755H10D30/6758H10D89/60H10D99/00H01L2225/06541
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Quick Facts
Patent No.
US 12,446,258
App. No.
19/060,198
Granted
Oct 14, 2025
Kind
B2
Abstract

Novel semiconductor devices are taught. The novel devices include a thin film transistor (TFT) with an n-type semiconductor layer to form a channel between a source and a drain. The TFT further includes a source-channel interfacial member adjacent to at least the source contact of the device to provide depletion layer control of the operation of the TFT.

Claims (57)

1. A thin-film transistor comprising:

a source disposed at a substrate or insulation layer, the source including a source contact;

a drain disposed at the substrate or insulation layer and spaced apart from the source;

an n-type semiconductor layer extending between the source and drain for formation of a carrier channel between the source and drain, the n-type semiconductor layer including tin oxide; and

a source-channel interfacial member positioned between the source contact and the n-type semiconductor layer, the source-channel interfacial member being in contact with the source contact and the n-type semiconductor layer;

wherein the source-channel interfacial member is operable to deplete the carrier channel in a region of the n-type semiconductor layer adjacent the source contact to reduce leakage current when the thin-film transistor is off.

2. The thin-film transistor of claim 1 , wherein the source-channel interfacial member comprises a p-type semiconductor.

3. The thin-film transistor of claim 1 , wherein the source-channel interfacial member comprises a p-type metal oxide.

4. The thin-film transistor of claim 1 , wherein the source-channel interfacial member comprises oxidized material of the source contact.

5. The thin-film transistor of claim 1 , wherein the source-channel interfacial member comprises a layer of material deposited on the source contact.

6. The thin-film transistor of claim 1 , wherein the source contact comprises ruthenium.

7. The thin-film transistor of claim 6 , wherein source-channel interfacial member layer comprises ruthenium oxide.

8. The thin-film transistor of claim 1 , wherein the source contact comprises cobalt.

9. The thin-film transistor of claim 8 , wherein source-channel interfacial member layer comprises cobalt oxide.

10. The thin-film transistor of claim 1 , wherein the n-type semiconductor layer is formed by atomic layer deposition.

11. The thin-film transistor of claim 1 , further comprising:

a gate dielectric layer over the n-type semiconductor layer; and

a gate contact over the gate dielectric layer.

12. The thin-film transistor of claim 11 , wherein the gate dielectric layer comprises hafnium oxide.

13. The thin-film transistor of claim 1 , wherein:

the drain comprises a drain contact; and

the source-channel interfacial member extends between the drain contact and the n-type semiconductor layer, the source-channel interfacial member being in contact with the drain contact.

14. The thin-film transistor of claim 1 , wherein:

the drain comprises a drain contact; and

the thin-film transistor further comprises another channel interfacial member positioned between the drain contact and the n-type semiconductor layer, the other channel interfacial member being in contact with the drain contact and the n-type semiconductor layer.

15. A method of making a thin-film transistor comprising:

forming a source and drain at a substrate or insulation layer, the drain being spaced apart from the source, the source including a source contact;

forming a source-channel interfacial member at the source and in contact with the source contact; and

forming an n-type semiconductor layer between the source and drain and in contact with the source-channel interfacial member, the n-type semiconductor layer including tin oxide;

wherein the source-channel interfacial member is operable to deplete a carrier channel in a region of the n-type semiconductor layer adjacent the source contact to reduce leakage current when the thin-film transistor is off.

16. The method of claim 15 , wherein the source-channel interfacial member comprises a p-type semiconductor.

17. The method of claim 15 , wherein the source-channel interfacial member comprises a p-type metal oxide.

18. The method of claim 15 , wherein forming the source-channel interfacial member comprises oxidizing material of the source contact.

19. The method of claim 15 , wherein forming the source-channel interfacial member comprises forming a layer of material on the source contact.

20. The method of claim 15 , further comprising using atomic layer deposition to form the source-channel interfacial member on the source contact.

21. The method of claim 15 , wherein:

the source contact comprises ruthenium; and

source-channel interfacial member layer comprises ruthenium oxide.

22. The method of claim 15 , wherein:

the source contact comprises cobalt; and

the source-channel interfacial member layer comprises cobalt oxide.

23. The method of claim 15 , wherein forming the n-type semiconductor layer comprises using atomic layer deposition to form the n-type semiconductor layer.

24. The method of claim 15 , further comprising:

forming a gate dielectric layer over the n-type semiconductor layer; and

forming a gate contact over the gate dielectric layer.

25. The method of claim 24 , wherein the gate dielectric layer comprises hafnium oxide.

26. The method of claim 15 , further comprising:

forming the source-channel interfacial member at the drain and in contact with a drain contact.

27. The method of claim 15 , further comprising:

forming another channel interfacial member at the drain and in contact with a drain contact;

wherein n-type semiconductor layer is formed in contact with the other channel interfacial member.

28. A method of making a thin-film transistor comprising:

with a wafer that includes a source and drain positioned at a substrate or insulation layer and a source-channel interfacial member formed in contact with a source contact of the source, using atomic layer deposition to deposit tin oxide to form an n-type semiconductor layer between the source and drain and in contact with the source-channel interfacial member;

wherein the source-channel interfacial member is operable to deplete a carrier channel in a region of the n-type semiconductor layer adjacent the source to reduce leakage current when the thin-film transistor is off.

29. The method of claim 28 , further comprising using atomic layer deposition to form the source-channel interfacial member.

30. The method of claim 28 , further comprising:

using atomic layer deposition to deposit a gate dielectric layer over the n-type semiconductor layer.

Assignments (3)
CONFIRMATORY ASSIGNMENT Recorded Feb 21, 2025
From: BARLAGE, DOUGLAS W.; SHOUTE, LHING GEM; CADIEN, KENNETH C.; MA, ALEX MUNNLICK; MILBURN, ERIC WILSON
To: SYNTHERGY INC.
Reel/Frame 070293/0673 →
CONFIRMATORY ASSIGNMENT Recorded Feb 21, 2025
From: SYNTHERGY INC.
To: ZINITE CORPORATION
Reel/Frame 070294/0212 →
CONFIRMATORY ASSIGNMENT Recorded Feb 21, 2025
From: BARLAGE, DOUGLAS W.; SHOUTE, LHING GEM; CADIEN, KENNETH C.; MA, ALEX MUNNLICK; MILBURN, ERIC WILSON
To: ZINITE CORPORATION
Reel/Frame 070294/0219 →
Continuity (3)
Continuation 18576205
Provisional Application 63221292 · Jul 13, 2021
Related Publication 20250234589A1 · Jul 17, 2025
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