Built-in self test technique for programmable impedance drivers for RapidChip and ASIC drivers
A circuit which includes the addition of test points and analog circuitry required to perform a four-point measurement technique. Test points are fed to an analog multiplexer which is under control of test logic added to the design to facilitate the testing. The output of the analog multiplexer is fed directly to an n-bit Analog-to-Digital Converter (ADC), when the number of bits is determined by the measurement resolution required for the circuit to be tested. The ADC is controlled by digital test logic instantiated in the design to perform the BIST operation. A known current is injected and held constant during the entire BIST operation, and the BIST logic performs voltage measurements. The voltage differential is compared by the BIST circuitry based on the values obtained from the ADC. Then, a pass/fail bit can be passed to a signal pin on the device to be compared by the ATE.
1. A circuit for testing a programmable impedance driver, said circuit being disposed between ATE pin electronics and a DUT, said circuit comprising: a plurality of contact points; a multiplexer having an input and an output; an ADC having an input and a plurality of outputs; leads between said contact points and said input of said multiplexer, said output of said multiplexer being connected to said input of said ADC, circuitry operably connected to said multiplexer and said ADC, said circuitry configured to control said multiplexer and said ADC such that a digital representation of voltages at the contact points is provided at the outputs of said ADC.
2. A circuit as recited in claim 1 , wherein said plurality of contact points comprises two contact points.
3. A circuit as recited in claim 1 , wherein said multiplexer comprises an analog multiplexer.
4. A circuit as recited in claim 1 , wherein said circuitry connected to said multiplexer comprises test logic configured to facilitate the testing.
5. A circuit as recited in claim 1 , wherein said circuitry connected to said ADC comprises digital test logic configured to perform a BIST operation.
6. A circuit as recited in claim 5 , wherein said digital test logic is configured to perform two measurements to obtain the digital representation of voltages at the contact points at the outputs of said ADC.
7. A method for testing a programmable impedance driver, said method comprises using a circuit being disposed between contact points of ATE pin electronics and a DUT, said circuit comprising a plurality of contact points; a multiplexer having an input and an output; an ADC having an input and a plurality of outputs; leads between said contact points and said input of said multiplexer, said output of said multiplexer being connected to said input of said ADC, circuitry operably connected to said multiplexer and said ADC, said circuitry configured to control said multiplexer and said ADC such that a digital representation of voltages at the contact points is provided at the outputs of said ADC, said method further comprising applying a pre-detennined current at a contact point at the DUT, and using the circuit to obtain, at the outputs of the ADC, said digital representation.
8. A method as recited in claim 7 , further comprising using two contact points of the circuit.
9. A method as recited in claim 7 , further comprising using an analog multiplexer as said multiplexer.
10. A method as recited in claim 7 , further comprising using test logic connected to said multiplexer to facilitate the testing.
11. A method as recited in claim 7 , further comprising using digital test logic configured to perform a BIST operation, said digital test logic being connected to said ADC.
12. A method as recited in claim 11 , further comprising using said digital test logic to perform two measurements to obtain the digital representation at the output of said ADC.