IP Library Granted Patent US 7,106,096
Granted Patent B2
US 7,106,096 · App. 10/904,460 · Granted Sep 12, 2006

Circuit and method of controlling integrated circuit power consumption using phase change switches

Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 7,106,096
App. No.
10/904,460
Filed
Nov 11, 2004
Granted
Sep 12, 2006
Kind
B2
Art Unit
2819
USPC
326/37
Abstract

A circuit and method of controlling integrated circuit power consumption using phase change switches where the phase change switches switchably couple and decouple power sources to logic blocks in response to a programming voltage.

Claims (38)

1. A method for controlling power consumption, comprising:

a logic block;

a power source;

a phase change switch adapted to couple the power source to the logic block in accordance with the phase change switch being configured in a low impedance state and adapted to decouple the power source from the logic block in accordance with the phase change switch being configured in a high impedance state, said phase change consisting of a crystalline to amorphous phase change;

a programming circuit coupled to the phase change switch and adapted to provide a programming voltage to the phase change switch, wherein the phase change switch is configured in accordance with the programming voltage; and

a voltage generation circuit adapted to supply a first boosted voltage and a second boosted voltage to the programming circuit, wherein the second boosted voltage is greater than the first boosted voltage and the programming voltage corresponds to one of the first boosted voltage, the second boosted voltage, and ground.

2. The circuit of claim 1 , wherein the voltage generation circuit comprises a charge pump circuit.

3. The circuit of claim 1 , wherein the phase change switch is in the low impedance state in accordance with the programming voltage being a low voltage signal, and the phase change switch is in the high impedance state in accordance with the programming voltage being a high voltage signal.

4. The circuit of claim 3 , wherein the high impedance state of the phase change switch is characterized by an impedance of approximately 5×10 7 Ohms/um and the low impedance state of the phase change switch is characterized by an impedance of approximately 50 Ohms/um.

5. The circuit of claim 1 , wherein the phase change switch comprises:

a phase change material;

a heating element adapted to heat the phase change material in response to a voltage applied to the heating element; and

an insulator surrounding the phase change material, wherein the insulator is adapted to electrically isolate the phase change material from the heating element.

6. The circuit of claim 5 , wherein the phase change material comprises a chalcogenide.

7. The circuit of claim 6 , wherein the chalcogenide comprises Ge 2 Sb 2 Te 5 .

8. An integrated circuit, comprising:

a semiconductor substrate;

a logic block formed within the semiconductor substrate;

a power source;

a phase change switch adapted to couple the power source to the logic block in accordance with the phase change switch being configured in a low impedance state and adapted to decouple the power source from the logic block in accordance with the phase change switch being configured in a high impedance state, said phase change consisting of a crystalline to amorphous phase change;

a programming circuit coupled to the phase change switch and adapted to provide a programming voltage to the phase change switch, wherein the phase change switch is configured in accordance with the programming voltage; and

a voltage generation circuit adapted to supply a first boosted voltage and a second boosted voltage to the programming circuit, wherein the second boosted voltage is greater than the first boosted voltage and the programming voltage corresponds to one of the first boosted voltage, the second boosted voltage, and ground.

9. The integrated circuit of claim 8 , wherein the voltage generation circuit comprises a charge pump circuit.

10. The integrated circuit of claim 8 , wherein the phase change switch is in the low impedance state in accordance with the programming voltage being a low voltage signal, and the phase change switch is in the high impedance state in accordance with the programming voltage being a high voltage signal.

11. The integrated circuit of claim 10 , wherein the high impedance state of the phase change switch is characterized by an impedance of approximately 5×10 7 Ohms/um and the low impedance state of the phase change switch is characterized by an impedance of approximately 50 Ohms/um.

12. The integrated circuit of claim 8 , wherein the phase change switch comprises:

a phase change material;

a heating element adapted to heat the phase change material in response to a voltage applied to the heating element; and

an insulator surrounding the phase change material, wherein the insulator is adapted to electrically isolate the phase change material from the heating element.

13. The integrated circuit of claim 12 , wherein the phase change material comprises a chalcogenide.

14. The integrated circuit of claim 13 , wherein the chalcogenide comprises Ge 2 Sb 2 Te 5 .

15. A method of controlling power consumption of an integrated circuit, comprising the steps of:

receiving at least one control signal, wherein the control signal indicates an operational mode of a logic block;

supplying a programming voltage to a phase change switch in response to the control signal;

configuring the phase change switch in response to the programming voltage, wherein said phase change consists of a crystalline to amorphous phase change; and

generating a first boosted voltage and a second boosted voltage, wherein the second boosted voltage is greater than the first boosted voltage and the programming voltage corresponds to one of the first boosted voltage, the second boosted voltage, and ground.

16. The method of claim 15 , wherein the programming voltage corresponds to the first boosted voltage in accordance with the control signal indicating that the logic block is to be configured in an operational state, and the programming voltage corresponds to the second boosted voltage in accordance with the control signal indicating that the logic block is to be configured in a non-operational state.

17. The method of claim 15 , wherein the programming voltage is applied for at least 100 ns.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2019
From: GLOBALFOUNDRIES U.S. INC.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 051070/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2019
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 050122/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2004
From: ZHU, HUILONG; WONG, HON-SUM PHILIP; WANG, XINLIN; HANSON, DAVID R.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 015352/0398 →
Continuity (1)
Related Publication 20060097775A1 · May 11, 2006