Method and structure to create multiple device widths in FinFET technology in both bulk and SOI
View Patent ↗Disclosed is a structure and method for producing a fin-type field effect transistor (FinFET) that has a buried oxide layer over a substrate, at least one first fin structure and at least one second fin structure positioned on the buried oxide layer. First spacers are adjacent the first fin structure and second spacers are adjacent the second fin structure. The first spacers cover a larger portion of the first fin structure when compared to the portion of the second fin structure covered by the second spacers. Those fins that have larger spacers will receive a smaller area of semiconductor doping and those fins that have smaller spacers will receive a larger area of semiconductor doping. Therefore, there is a difference in doping between the first fins and the second fins that is caused by the differently sized spacers. The difference in doping between the first fins and the second fins changes an effective width of the second fins when compared to the first fins.
1. A fin-type field effect transistor (FinFET) comprising:
a first fin structure positioned on a substrate;
a second fin structure positioned on said substrate;
first spacers adjacent said first fin structure; and
second spacers adjacent said second fin structure,
wherein said first spacers cover a larger portion of said first fin structure when compared to the portion of said second fin structure covered by said second spacers, and
wherein first spacers are larger than said second spacers and the difference in size between said first spacers and said second spacers is adapted to provide a difference between said first fin structure and said second fin structure.
2. The FinFET in claim 1 , wherein the difference in size between said first spacers and said second spacers is adapted to provide a difference in doping between said first fin structure and said second fin structure.
3. The FinFET in claim 2 , wherein said difference in doping between said first fin structure and said second fin structure changes an effective channel width of said first fin structure when compared to said second fin structure.
4. The FinFET in claim 1 , wherein said first spacers and said second spacers include doping impurities adapted to diffuse into adjacent portions of said first fin structure and said second fin structure so as to cause the portion of each fin structure that is adjacent each spacer to comprise an electrically inactive portion of the device.
5. The FinFET in claim 1 , wherein said first spacers and said second spacers comprise the same material.
6. The FinFET in claim 1 , wherein said first spacers and said second spacers comprise the same material.
7. A fin-type field effect transistor (FinFET) comprising:
a first fin structure positioned on a substrate;
a second fin structure positioned on said substrate;
first spacers adjacent said first fin structure; and
second spacers adjacent said second fin structure,
wherein said first spacers cover a larger portion of said first fin structure when compared to the portion of said second fin structure covered by said second spacers, and
wherein said first fin structure is the same physical size as said second fin structure.
8. A fin-type field effect transistor (FinFET) comprising:
a first fin structure positioned on a substrate;
a second fin structure positioned on said substrate;
first spacers adjacent said first fin structure; and
second spacers adjacent said second fin structure,
wherein said first spacers cover a larger portion of said first fin structure when compared to the portion of said second fin structure covered by said second spacers, further comprising:
at least one gate conductor over said first fin structure and said second fin structure; and
a gate insulator positioned between said gate conductor and said first fin structure and said second fin structure.
9. A fin-type field effect transistor (FinFET) comprising:
a buried oxide layer over a substrate;
a first fin structure positioned on said buried oxide layer;
a second fin structure positioned OD said buried oxide layer;
spacers adjacent only said first fin structure; and
a gate insulator covering a full length of said second fin structure,
wherein said spacers are adapted to provide a difference in doping between the first fin structure and the second fin structure.
10. The FinFET in claim 9 , wherein said difference in doping between said first fin structure and said, second fin structure changes an effective channel width of said first fin structure when compared to said second fin structure.
11. A fin-type field effect transistor (FinFET) comprising:
a buried oxide layer over a substrate;
a first fin structure positioned on said buried oxide layer;
a second fin structure positioned on said buried oxide layer;
spacers adjacent only said first fin structure; and
a gate insulator covering a full length of said second fin structure,
wherein said spacers include doping impurities adapted to diffuse into adjacent portions of said first fin structure so as to cause the portion of said first fin structure that is adjacent said first spacers to comprise an electrically inactive portion of the device.