Store-to-load forwarding buffer using indexed lookup
A microprocessor may include a dispatch unit configured to dispatch load and store operations and a load store unit configured to store information associated with load and store operations dispatched by the dispatch unit. The load store unit includes a STLF (Store-to-Load Forwarding) buffer that includes a plurality of entries. The load store unit is configured to generate an index dependent on at least a portion of an address of a load operation, to use the index to select one of the plurality of entries, and to forward data included in the one of the plurality of entries as a result of the load operation.
1. A microprocessor, comprising:
a dispatch unit configured to dispatch load and store operations; and
a load store unit configured to store information associated with load and store operations dispatched by the dispatch unit, wherein the load store unit includes an indexed STLF (Store-to-Load Forwarding) buffer, and wherein the indexed STLF buffer includes a plurality of entries each of which is selectable using a fixed index value unique to that entry;
wherein the load store unit is further configured to:
generate an index value dependent on at least a portion of an address of a load operation, wherein the generated index value is one of the fixed index values;
index into the indexed STLF buffer using the generated index value to select one of the plurality of entries; and
forward data included in the one of the plurality of entries selected by the generated index value as a result of the load operation.
2. The microprocessor of claim 1 , wherein the load store unit is configured to not forward the data included in the one of the plurality of entries as the result of the load operation if information included in the one of the plurality of entries does not match information associated with the load operation.
3. The microprocessor of claim 1 , wherein the one of the plurality of entries in the STLF buffer is configured to store an address, data, and a data size associated with a store operation.
4. The microprocessor of claim 1 , wherein each of the plurality of entries in the STLF buffer has a capacity to store a maximum amount of data that can be written by a store operation.
5. The microprocessor of claim 1 , wherein the load store unit is configured to select which one of the plurality of entries to allocate to a store operation by generating an additional index value dependent on at least a portion of an address of the store operation.
6. The microprocessor of claim 5 , wherein the load store unit is configured to generate the additional index value dependent on both the at least a portion of the address of the store operation and a number of bytes of data operated on by the store operation, and wherein the load store unit is configured to generate the index value dependent on both the at least a portion of the address of the load operation and a number of bytes of data operated on by the load operation.
7. The microprocessor of claim 6 , wherein the additional index value is generated by right-shifting a lower portion of the address targeted by the store operation by an amount equal to a logarithm in base two of the number of bytes of data operated on by the store operation.
8. The microprocessor of claim 5 , wherein the additional index value comprises a portion of the address targeted by the store operation.
9. The microprocessor of claim 1 , wherein the load store unit further comprises a STLF checker configured to verify correct operation of the STLF buffer in said forwarding data as a result of the load operation.
10. The microprocessor of claim 9 , wherein the STLF checker is configured to perform an associative address comparison to identify all issued store operations targeting a same address as the load operation and to implement a find-first algorithm to select a youngest issued store operation that is older than the load operation.
11. The microprocessor of claim 9 , wherein the STLF checker is configured to replay the load operation in response to the STLF checker identifying incorrect operation of the STLF buffer.
12. The microprocessor of claim 9 , wherein the STLF checker is configured to replay one or more additional operations that are dependent on the load operation in response to the STLF checker detecting incorrect operation of the STLF buffer.
13. The microprocessor of claim 9 , wherein the load store unit is configured to identify the result of the load operation as a speculative value in response to forwarding the data in the one of the plurality of entries included in the STLF buffer as the result of the load operation; wherein if the STLF checker verifies that the STLF buffer operated correctly for the load operation, the load store unit is configured to indicate that the result of the load operation is not speculative.
14. A computer system, comprising:
a system memory; and
a microprocessor coupled to the system memory, comprising:
a dispatch unit configured to dispatch load and store operations; and
a load store unit configured to store information associated with load and store operations dispatched by the dispatch unit, wherein the load store unit includes an indexed STLF (Store-to-Load Forwarding) buffer, and wherein the indexed STLF buffer includes a plurality of entries each of which is selectable using a fixed index value unique to that entry;
wherein the load store unit is further configured to:
generate an index value dependent on at least a portion of an address of a load operation, wherein the generated index value is one of the fixed index values;
index into the indexed STLF buffer using the generated index value to select one of the plurality of entries; and
forward data included in the one of the plurality of entries selected by the generated index value as a result of the load operation.
15. The computer system of claim 14 , wherein the load store unit is configured to not forward the data included in the one of the plurality of entries as the result of the load operation if information included in the one of the plurality of entries does not match information associated with the load operation.
16. The computer system of claim 14 , wherein the load store unit is configured to select which one of the plurality of entries to allocate to a store operation by generating an additional index value dependent on at least a portion of an address of the store operation.
17. The computer system of claim 16 , wherein the load store unit is configured to generate the additional index value dependent on both the at least a portion of the address of the store operation and a number of bytes of data operated on by the store operation, and wherein the load store unit is configured to generate the index value dependent on both the at least a portion of the address of the load operation and a number of bytes of data operated on by the load operation.
18. The computer system of claim 14 , wherein the load store unit further comprises a STLF checker configured to verify correct operation of the STLF buffer in said forwarding data as a result of the load operation.
19. The computer system of claim 18 , wherein the STLF checker is configured to replay the load operation in response to the STLF checker identifying incorrect operation of the STLF buffer.
20. A method, comprising:
receiving an address of a load operation;
generating an index value corresponding to the address;
indexing into an indexed STLF (Store-to-Load Forwarding) buffer using the generated index value to select an entry from a plurality of entries included in the indexed STLF buffer, wherein each of the pluralities of entries is selectable using a fixed index value unique to that entry and the generated index value is one of the fixed index values; and
forwarding data included in the entry selected by the generated index value as a result of the load operation.
21. The method of claim 20 , wherein said forwarding is dependent on information included in the entry matching information associated with the load operation.
22. The method of claim 20 , further comprising the entry storing an address, data, and a data size associated with a store operation.
23. The method of claim 20 , wherein each of the plurality of entries in the STLF buffer has a capacity to store a maximum amount of data that can be written by a store operation.
24. The method of claim 20 , further comprising selecting which one of the plurality of entries to allocate to a store operation by generating an additional index value dependent on at least a portion of an address of the store operation.
25. The method of claim 24 , wherein said generating the additional index value is dependent on both the at least a portion of the address of the store operation and a number of bytes of data operated on by the store operation, and wherein said generating the index value is dependent on both the at least a portion of the address of the load operation and a number of bytes of data operated on by the load operation.
26. The method of claim 25 , wherein said generating the additional index value comprises right-shifting a lower portion of the address targeted by the store operation by an amount equal to a logarithm in base two of the number of bytes of data operated on by the store operation.
27. The method of claim 24 , wherein the additional index value comprises a portion of the address targeted by the store operation.
28. The method of claim 20 , further comprising verifying operation of the STLF buffer by performing an associative address comparison to identify all issued store operations targeting a same address as the load operation and implementing a find-first algorithm to select a youngest issued store operation that is older than the load operation.
29. The method of claim 28 , further comprising replaying the load operation if said verifying identifies incorrect operation of the STLF buffer.
30. The method of claim 28 , further comprising replaying one or more additional operations that are dependent on the load operation if said verifying detects incorrect operation of the STLF buffer.
31. The method of claim 28 , further comprising:
identifying the result of the load operation as a speculative value in response to forwarding the data in the entry included in the STLF buffer as the result of the load operation; and
if said verifying verifies that the STLF buffer operated correctly for the load operation, indicating that the result of the load operation is not speculative.