Microcontroller for logic built-in self test (LBIST)
View Patent ↗Built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification. Microcontroller includes a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements, a plurality of library design circuit elements adapted to store a uniquely defined set of input and output signals to enable a logic BIST, and a plurality of latches adapted to store a plurality of values corresponding to a behavioral profile of a test clock.
1. A built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification, comprising:
a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements;
a plurality of temporary library design circuit elements enabling a logic BIST; and
a plurality of latches adapted to store a plurality of values corresponding to a behavioral profile of a test clock.
2. The BIST controller in accordance with claim 1 , wherein said plurality of temporary library design circuit elements comprise storage elements that store instructions and data generated during manufacturing test.
3. The BIST controller in accordance with claim 2 , wherein the storage elements comprise a read only memory (ROM).
4. The BIST controller in accordance with claim 2 , wherein the storage elements comprise a random access memory (RAM).
5. The BIST controller in accordance with claim 1 , wherein the plurality of latches comprise clock gating latches.
6. The BIST controller in accordance with claim 1 , wherein the microcontroller is utilized for at speed structural testing of chips.
7. The BIST controller in accordance with claim 1 , wherein the microcontroller utilizes a general purpose microcontroller using scan data determined during a manufacturing test to run the logic BIST.
8. The BIST controller in accordance with claim 1 , wherein the microcontroller provides a library core to programmably set up clock trees for at speed structural test (ASST) that uses scan bit data generated during a manufacturing test to set up the clock trees.
9. The BIST controller in accordance with claim 1 , wherein the microcontroller includes a control logic that receives an instruction from a program store and decomposes the instruction into necessary control signals that determine how data is to flow through the control logic.
10. The BIST controller in accordance with claim 1 , wherein the BIST controller is programmable and can be reloaded with programs for the logic BIST.