Semiconductor package including flip chip controller at bottom of die stack
A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.
1. A method of forming a semiconductor package, comprising the steps of:
(a) forming a conductance pattern on a surface of a substrate, the conductance pattern including a cluster of contact pads;
(b) affixing a controller die to the surface of the substrate in a flip chip arrangement with a cluster of die bond pads on the controller die electrically coupling with the cluster of contact pads on the substrate;
(c) affixing a first flash memory die directly to the surface of the substrate, the first flash memory die positioned next to the controller die;
(d) affixing at least a second flash memory die on top of the controller die and first flash memory die bonded in said steps (b) and (c);
(e) wirebonding the at least second flash memory die affixed in said step (d) to the substrate;
(f) encapsulating the flip chip controller die, the first flash memory die and the at least second flash memory die in a molding compound and wherein said step (c) comprises the step of wire bonding the first flash memory die to the substrate.
2. A method as recited in claim 1 , said step (c) comprising the step of affixing the first flash memory die to the substrate with a flip-chip electrical bond.
3. A method as recited in claim 1 , further comprising the step (f) of mounting a flash memory die to the substrate side-by-side with the controller die.
4. A method as recited in claim 1 , the step (f) of mounting a flash memory die to the substrate side-by-side with the controller die comprising the step of mounting the flash memory die to the substrate in a flip chip arrangement.
5. A method as recited in claim 1 , the step (f) of mounting a flash memory die to the substrate side-by-side with the controller die comprising the step of mounting the flash memory die to the substrate by wire bonding the flash memory die to the substrate.
6. A method as recited in claim 1 , said step (b) of affixing a semiconductor die to the surface of the substrate in a flip chip arrangement comprising the step of affixing a flash memory die to the substrate in a flip chip arrangement.
7. A method as recited in claim 6 , said step (c) of affixing one or more additional semiconductor die on top of the flash memory die comprises the step of mounting one or more additional flash memory die and a controller die on top of the flip chip flash memory die.
8. A method of forming a semiconductor package, comprising the steps of:
(a) forming a conductance pattern on a surface of a substrate, the conductance pattern including a cluster of contact pads;
(b) affixing a controller die to the surface of the substrate in a flip chip arrangement with a cluster of die bond pads on the controller die electrically coupling with the cluster of contact pads on the substrate;
(c) affixing a first flash memory die to the substrate next to the controller die affixed in said step (b);
(d) affixing at least a second flash memory die on top of the controller die and first flash memory die affixed in said steps (b) and (c), the at least second flash memory die being the same type of semiconductor die as the first flash memory die but the at least second flash memory die having a length greater than a length of the first flash memory die;
(e) wirebonding the at least a second flash memory die affixed in said step (d) to the substrate;
(f) encapsulating the controller die and flash memory die in a molding compound and wherein said step (c) comprises the step of wire bonding the first flash memory die to the substrate.
9. A method as recited in claim 8 , further comprising the step (g) of mounting a flash memory die to the substrate side-by-side with the controller die.
10. A method as recited in claim 9 , the step (g) of mounting a flash memory die to the substrate side-by-side with the controller die comprising the step of mounting the flash memory die to the substrate in a flip chip arrangement.
11. A method as recited in claim 9 , the step (g) of mounting a flash memory die to the substrate side-by-side with the controller die comprising the step of mounting the flash memory die to the substrate by wire bonding the flash memory die to the substrate.
12. A method as recited in claim 8 , said step (c) comprising the step of electrically coupling the first flash memory die to the substrate via flip-chip bonding.
13. A method as recited in claim 8 , said steps (b) and (c) of affixing a controller die and a first flash memory die to the substrate comprising the steps of affixing a controller die and first flash memory die having a footprint of approximately the same size as the at least second flash memory die to be mounted on the controller die and first flash memory die.
14. A method as recited in claim 8 , said steps (b) and (c) of affixing the controller die and the first flash memory die to the substrate comprising the steps of affixing the controller die and the first flash memory die having a footprint that is larger than size of the at least second flash memory die to be mounted on the controller die and the first flash memory die.
15. A method as recited in claim 8 , said steps (b) and (c) of affixing the controller die and the first flash memory die to the substrate comprising the steps of affixing the controller die and the first flash memory die having a footprint that is smaller than a size of the at least second flash memory die to be mounted on the controller die and the first flash memory die.