IP Library › Granted Patent US 7,910,910
Granted Patent B2
US 7,910,910 · App. 12/276,905 · Granted Mar 22, 2011

Phase-change memory cell and method of fabricating the phase-change memory cell

Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 7,910,910
App. No.
12/276,905
Granted
Mar 22, 2011
Kind
B2
Abstract

A memory cell (and method of fabricating the memory cell) includes a stencil layer having a first opening, a phase-change material layer formed on a first electrode layer, and an electrically conductive layer formed on the first electrode layer, the electrically conductive layer having a pillar-shaped portion which is formed on the phase-change material layer and fills the first opening.

Claims (33)

1. A memory cell, comprising:

a stencil layer having a first opening;

a phase-change material layer formed on a first electrode layer; and

an electrically conductive layer formed on said first electrode layer, said electrically conductive layer including a pillar-shaped portion which is formed on an outer sidewall of said phase-change material layer and fills said first opening.

2. The memory cell of claim 1 , further comprising:

an insulating layer formed on a first electrode layer, said stencil layer being formed on said insulating layer,

wherein said insulating layer has a second opening with a diameter which is greater than a diameter of said first opening.

3. The memory cell according to claim 2 , wherein said pillar-shaped portion surrounds a sidewall of said phase-change material layer.

4. The memory cell according to claim 3 , wherein a bottom of said phase-change material layer is surrounded by said first electrode layer, and a remaining portion of said phase-change material layer is surrounded by said pillar-shaped portion.

5. The memory cell according to claim 3 , wherein a gap is formed between a sidewall of said pillar structure and said insulating layer to thermally isolate said pillar structure.

6. The memory cell according to claim 3 , wherein said first and second opening comprise circular-shaped openings.

7. The memory cell according to claim 1 , wherein said phase-change material layer comprises a plurality of phase-change material layers formed in a multi-layer stack.

8. The memory cell according to claim 7 , wherein said plurality of phase-change material layers have different phase transition temperatures.

9. The memory cell according to claim 8 , wherein said multilayer stack further comprises at least one barrier layer formed between said plurality of phase-change material layers.

10. The memory cell according to claim 1 , wherein the phase-change material layer comprises an island of phase-change material formed on a surface, and the electrically conductive layer is formed on the surface adjacent to the island of phase-change material.

11. The memory cell according to claim 1 , wherein the phase-change material layer comprises an island of phase-change material formed on a surface of the first electrode layer, and the electrically conductive layer is formed on the surface of the first electrode layer adjacent to the island of phase-change material.

12. A method of fabricating a memory cell, comprising:

forming a stencil layer having a first opening;

depositing a phase-change material layer through said first opening in said stencil layer onto a first electrode layer; and

forming an electrically conductive layer on said first electrode layer, said electrically conductive layer including a pillar-shaped portion which is formed on an outer sidewall of said phase-change material layer and fills said first opening.

13. The method according to claim 12 , further comprising:

forming an insulating layer on said first electrode layer, said stencil layer being formed on said insulating layer; and

etching said insulating layer through said first opening to form a second opening in said insulating layer, said second opening having a diameter which is greater than a diameter of said first opening.

14. The method according to claim 13 , wherein said etching said insulating layer comprises undercut etching in which a portion of said insulating layer underneath said stencil layer is etched.

15. The method according to claim 13 , wherein said electrically conductive layer is deposited using a deposition beam having a spread-angle for deposition which is greater than the spread-angle for deposition for said phase-change material layer by using one of different deposition conditions, and different deposition techniques to form said phase-change material layer and said pillar-shaped portion.

16. The method according to claim 13 , wherein said phase-change material layer is deposited using a first directional beam, and said electrically conductive layer is deposited using a second directional beam having a broader angle of deposition than said first directional beam.

17. The method according to claim 13 , wherein said depositing said phase-change material layer and said depositing said electrically conductive layer comprise providing an angle of deposition by using one of a change in a beam characteristic and a change in substrate orientation.

18. The method according to claim 13 , further comprising:

depositing another electrically conductive layer through said opening in said stencil layer onto said first electrode layer, said phase-change material layer being formed on said another electrically conductive layer, such that said phase-change material layer is surrounded by said electrically conductive layer and said another electrically conductive layer.

19. The method according to claim 18 , wherein said depositing said phase-change material layer comprises directionally depositing said phase-change material layer, such that said phase-change material layer is deposited off-center from said opening in said stencil layer.

20. An electrically conductive layer for a memory cell including a lower electrode, a phase-change material layer formed on the lower electrode and a stencil layer formed on the lower electrode, the electrically conductive layer comprising:

an upper electrode portion formed on the stencil layer and comprising an upper electrode of the memory cell; and

a heating element portion for heating the phase-change material layer, the heating element portion being integrally formed with the upper electrode portion and comprising a pillar-shaped structure which is formed on the lower electrode and on an outer sidewall of the phase-change material layer and fills an opening in the stencil layer.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
Continuity (3)
Continuation 11150184 · Jun 13, 2005
Division 10766936 · Jan 30, 2004
Related Publication 20090072214A1 · Mar 19, 2009