Semiconductor package with passivation island for reducing stress on solder bumps
A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed over the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.
1. A method of making a semiconductor package, comprising:
providing a substrate having a plurality of active devices formed thereon;
forming a contact pad over the substrate in electrical contact with the plurality of active devices;
forming a passivation layer above the substrate, wherein a portion of the passivation layer is removed to create a passivation island with a circular footprint and isolated from the passivation layer by the removed portion;
forming an under bump metallization (UBM) layer over the contact pad and around the passivation island, wherein a center portion of the passivation island is devoid of the UBM layer; and
forming a bump over the passivation island and in contact with the UBM layer, wherein the center portion of the passivation island being devoid of the UBM layer forms a controlled void in the bump for stress relief.
2. The method of claim 1 , further including centering the passivation island with respect to the contact pad.
3. The method of claim 1 , further including disposing the UBM layer above the passivation layer.
4. The method of claim 1 , wherein the passivation island extends above the contact pad.
5. The method of claim 4 , further including forming the controlled void by nature of the passivation island extending above the contact pad such that a depth and volume of the controlled void is determined by a width and height of the passivation island.
6. A method of making a semiconductor package, comprising:
providing a substrate having a plurality of active devices formed thereon;
forming a contact pad over the substrate in electrical contact with the plurality of active devices;
forming a passivation layer over the substrate, wherein a portion of the passivation layer is removed to create a passivation island isolated from the passivation layer by the removed portion;
forming an under bump metallization (UBM) layer over the contact pad and around the passivation island, wherein a top portion of the passivation island is devoid of the UBM layer; and
forming a bump over the passivation island in electrical contact with the contact pad, wherein the top portion of the passivation island being devoid of the UBM layer forms a void in the bump for stress relief.
7. The method of claim 6 , further including centering the passivation island with respect to the contact pad.
8. The method of claim 6 , wherein the passivation island extends above the contact pad.
9. The method of claim 8 , further including forming the void by nature of the passivation island extending above the contact pad such that a depth and volume of the void is determined by a width and height of the passivation island.
10. The method of claim 6 , further including disposing the UBM layer above the passivation layer.
11. The method of claim 6 , wherein the passivation island includes a circular footprint.
12. A method of making a semiconductor package, comprising:
providing a substrate having a plurality of active devices formed thereon;
forming a contact pad over the substrate in electrical contact with the plurality of active devices;
forming a passivation layer above the substrate, wherein a portion of the passivation layer is removed to create a passivation island isolated from the passivation layer by the removed portion;
forming an under bump metallization (UBM) layer over the contact pad and around the passivation island, wherein a center portion of the passivation island is devoid of the UBM layer; and
forming a bump over the passivation island and in contact with the UBM layer, wherein the center portion of the passivation island being devoid of the UBM layer forms a controlled void in the bump for stress relief.
13. The method of claim 12 , further including centering the passivation island with respect to the contact pad.
14. The method of claim 12 , further including disposing the UBM layer above the passivation layer.
15. The method of claim 12 , wherein the passivation island extends above the contact pad.
16. The method of claim 15 , further including forming the controlled void by nature of the passivation island extending above the contact pad such that a depth and volume of the controlled void is determined by a width and height of the passivation island.
17. The method of claim 12 , wherein the passivation island includes a circular footprint.
18. A method of making a semiconductor package, comprising:
providing a substrate;
forming a contact pad over the substrate;
forming a passivation layer over the substrate, wherein a portion of the passivation layer is removed to create a passivation island isolated from the passivation layer by the removed portion;
forming an under bump metallization (UBM) layer over the contact pad and around the passivation island, wherein a top portion of the passivation island is devoid of the UBM layer; and
forming a bump over the passivation island in electrical contact with the contact pad, wherein the top portion of the passivation island being devoid of the UBM layer forms a void in the bump for stress relief.
19. The method of claim 18 , further including centering the passivation island with respect to the contact pad.
20. The method of claim 18 , wherein the passivation island extends above the contact pad.
21. The method of claim 20 , further including forming the void by nature of the passivation island extending above the contact pad such that a depth and volume of the void is determined by a width and height of the passivation island.
22. The method of claim 18 , further including disposing the UBM layer above the passivation layer.
23. The method of claim 18 , wherein the substrate includes a plurality of active devices in electrical contact with the contact pad.
24. The method of claim 18 , wherein the bump is in contact with the UBM layer.
25. The method of claim 18 , wherein the passivation island includes a circular footprint.