Structure and method for an electrostatic discharge (ESD) silicon controlled rectifier (SCR) structure
View Patent ↗A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes first and second silicon controlled rectifiers (SCRs) formed in a substrate. Further, the first and the second SCRs each include at least one component commonly shared between the first and the second SCRs.
1. A bi-directional electrostatic discharge (ESD) structure comprising:
first and second silicon controlled rectifiers (SCRs) formed in a substrate, wherein the first and the second SCRs each comprise an NPN emitter commonly shared between the first and the second SCRs.
2. The structure of claim 1 , wherein the first and the second SCRs further comprises a trigger network commonly shared between the first and the second SCRs.
3. The structure of claim 1 , wherein the first and the second SCRs further comprises a NPN base commonly shared between the first and the second SCRs.
4. The structure of claim 3 , wherein the first and the second SCRs further comprises a trigger network commonly shared between the first and the second SCRs.
5. The structure of claim 1 , wherein the first and the second SCRs further comprises a trigger network commonly shared between the first and the second SCRs, wherein the trigger network comprises a plurality of PNP transistors.
6. The structure of claim 1 , further comprising at least one isolation formation between active regions,
wherein the at least one isolation formation comprises at least one of a shallow trench isolation (STI), a polysilicon layer and field oxide.
7. The structure of claim 6 , wherein the at least one isolation formation between active regions of the structure comprises an isolation formation between each active region of the structure.
8. The structure of claim 1 , further comprising
a diode string trigger network; and
an isolation formation between each active region of the structure,
wherein the first and the second SCRs further comprise a NPN base, and the diode string trigger network commonly shared between the first and the second SCRs, and
wherein the at least one isolation formation comprises at least one of a shallow trench isolation (STI), a polysilicon layer and field oxide.
9. A method comprising:
forming first and second silicon controlled rectifiers (SCRs) in a substrate, wherein the first and the second SCRs each comprise an NPN emitter commonly shared between the first and the second SCRs.
10. The method of claim 9 , wherein the first and the second SCRs further comprise a trigger network commonly shared between the first and the second SCRs.
11. The method of claim 9 , wherein the first and the second SCRs further comprise the substrate commonly shared between the first and the second SCRs.
12. A design structure embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, the design structure comprising:
first and second silicon controlled rectifiers (SCRs) formed in a substrate, wherein the first and the second SCRs each comprise an NPN emitter commonly shared between the first and the second SCRs.
13. The design structure of claim 12 , wherein the design structure comprises a netlist.
14. The design structure of claim 12 , wherein the design structure resides on storage medium as a data format used for the exchange of layout data of integrated circuits.
15. The design structure of claim 12 , wherein the design structure resides in a programmable gate array.
16. The bi-directional ESD structure of claim 1 , wherein:
the substrate is a P-type substrate;
the first SCR comprises:
a first PNP transistor that includes a first P+ region, a first N-well, and the P-type substrate; and
an first NPN transistor that includes the NPN emitter, the P-type substrate, and the first N-well; and
the second SCR comprises:
a second PNP transistor that includes a second P+ region, a second N-well, and the P-type substrate; and
a second NPN transistor that includes the NPN emitter, the P-type substrate, and the second N-well.
17. The bi-directional ESD structure of claim 16 , wherein the first N-well is a different structure than the second N-well.
18. The bi-directional ESD structure of claim 17 , wherein:
the first SCR further comprises a first N+ region;
the first N+ region and the first P+ region are formed in the first N-well;
the second SCR further comprises a second N+ region;
the second N+ region and the second P+ region are formed in the second N-well; and
the NPN emitter is formed in the P-type substrate.