Method and apparatus for configuring a content-addressable memory (CAM) design as binary CAM or ternary CAM
View Patent ↗A method for producing a configurable content-addressable memory (CAM) cell design, in which the method includes: inputting the configurable CAM cell design to a computer, the configurable CAM cell design capable of being configured as one of a binary CAM design and a ternary CAM design, depending on connections of a metal overlay; selecting one of a first metal overlay design for the binary CAM design and a second metal overlay design for a ternary CAM design; if the first metal overlay design is selected, then combining the first metal overlay design with the configurable CAM cell design to produce a binary CAM design including two binary CAM cells with a single search port, and outputting the binary CAM design; and if the second metal overlay design is selected, then combining the second metal overly design with the configurable CAM cell design to produce a ternary CAM design including a single ternary CAM cell with two search ports, and outputting the ternary CAM design by the computer.
1. A computer-implemented method for producing a configurable content-addressable memory (CAM) cell design, said method comprising:
inputting, to a computer, a configurable CAM cell design, said configurable CAM cell design comprising:
a first sub-cell design comprising a static random access memory (SRAM)-based ternary CAM cell connected to a first pair of search-lines and a first match-line output; and
a second sub-cell design comprising comparison circuitry connected to a second pair of search-lines and a second match-line output;
selecting, by using said computer, one of a first metal overlay design and a second metal overlay design to electrically connect said first and second sub-cell designs as one of a binary CAM design including two binary CAM cells with a single search port, and a ternary CAM design including a single ternary CAM cell with two search ports, respectively;
wherein said first metal overlay design comprises:
connections between storage data nodes of a first binary CAM cell, and said first match-line output and said second match-line output; and
connections between storage data nodes of a second binary CAM cell, and said first match-line output and said second match-line output; and
wherein said second metal overlay design comprises:
parallel connections between storage data nodes producing a first ternary CAM cell output and a second ternary CAM cell output, and said first match-line output and said second match-line output, respectively; and
outputting, by said computer, one of said binary CAM design including two binary CAM cells with a single search port, and said ternary CAM cell design including a single ternary CAM cell with two search ports according to said selecting of said first or said second metal overlay design, respectively.
2. The method of claim 1 , wherein said first metal overlay design further comprises
an AND gate that receives an output from each of said two binary CAM cells.
3. The method of claim 2 , wherein said first metal overlay design further comprises connections between inputs to data storage nodes of said first binary CAM cell to said first and second match-line outputs, and connections between inputs to data storage nodes of said second binary CAM cell to said first and second match-line outputs.
4. The method of claim 1 , wherein said second metal overlay design further comprises said first and second match-line outputs connecting to a first search port and a second search port, respectively, of said configured single ternary CAM cell with two search ports.
5. The method of claim 4 , wherein said second metal overlay design further comprises connections between inputs to data storage nodes, producing a first ternary CAM cell output and a second ternary CAM cell output, and said first and second match-line outputs, respectively.
6. The method of claim 1 , wherein said first sub-cell design comprises 16 transistors.
7. The method of claim 1 , wherein said second sub-cell design comprises 4 transistors.
8. A computer system for producing a configurable content-addressable memory (CAM) design, said system comprising:
a memory configured to:
store said configurable CAM cell design, said configurable CAM cell design comprising:
a first sub-cell design comprising a static random access memory (SRAM)-based ternary CAM cell connected to a first pair of search-lines and a first match-line output; and
a second sub-cell design comprising comparison circuitry connected to a second pair of search-lines and a second match-line output; and
a processor configured to:
select one of a first metal overlay design and a second metal overlay design to electrically connect said first and second sub-cell designs as one of a binary CAM design including two binary CAM cells with a single search port, and a ternary CAM design including a single ternary CAM cell with two search ports, respectively;
wherein said first metal overlay comprises:
connections between storage data nodes of a first binary CAM cell, and said first match-line output and said second match-line output; and
connections between data storage nodes of a second binary CAM cell, and said first match-line output and said second match-line output; and
wherein said second metal overlay comprises:
parallel connections between storage data nodes producing a first ternary CAM cell output and a second ternary CAM cell output, and said first match-line output and said second match-line output, respectively; and
output one of said binary CAM design including two binary CAM cells with a single search port, and said ternary CAM cell design including a single ternary CAM cell with two search ports according to a selection of said first or said second metal overlay design, respectively.
9. The system of claim 8 , wherein said first metal overlay design further comprises
an AND gate that receives an output from each of said two binary CAM cells.
10. The system of claim 9 , wherein said first metal overlay design further comprises connections between inputs to data storage nodes of said first binary CAM cell to said first and second match-line outputs, and connections between inputs to data storage nodes of said second binary CAM cell to said first and second match-line outputs.
11. The system of claim 8 , wherein said second metal overlay design further comprises said first and second match-line outputs connecting to a first search port and a second search port, respectively, of said configured single ternary CAM cell with two search ports.
12. The system of claim 11 , wherein said second metal overlay design further comprises connections between inputs to data storage nodes, producing a first ternary CAM cell output and a second ternary CAM cell output, and said first and second match-line outputs, respectively.
13. The system of claim 8 , wherein said first sub-cell design comprises 16 transistors.
14. The system of claim 8 , wherein said second sub-cell design comprises 4 transistors.
15. A computer program storage medium readable by a computer, tangibly embodying a computer program of instructions executable by said computer to perform a method for producing a configurable content-addressable memory (CAM) design, said method comprising:
inputting a configurable CAM cell design, said configurable CAM cell design comprising:
a first sub-cell design comprising a static random access memory (SRAM)-based ternary CAM cell connected to a first pair of search-lines and a first match-line output; and
a second sub-cell design comprising comparison circuitry connected to a second pair of search-lines and a second match-line output;
selecting one of a first metal overlay design and a second metal overlay design to electrically connect said first and second sub-cell designs as one of a binary CAM design including two binary CAM cells with a single search port, and a ternary CAM design including a single ternary CAM cell with two search ports, respectively;
wherein said first metal overlay design comprises:
connections between storage data nodes of a first binary CAM cell, and said first match-line output and said second match-line output; and
connections between storage data nodes of a second binary CAM cell, and said first match-line output and said second match-line output; and
wherein said second metal overlay comprises:
parallel connections between storage data nodes, corresponding to a first ternary CAM cell output and a second ternary CAM cell output, and said first match-line output and said second match-line output, respectively; and
outputting one of said binary CAM design including two binary CAM cells with a single search port, and said ternary CAM cell design including a single ternary CAM cell with two search ports, according to said selecting of said first or said second metal overlay design, respectively.
16. The computer program storage medium of claim 15 , wherein said first metal overlay design further comprises an AND gate that receives an output from each of said two binary CAM cells.
17. The computer program storage medium of claim 16 , wherein said first metal overlay design further comprises connections between inputs to data storage nodes of said first binary CAM cell to said first and second match-line outputs, and connections between inputs to data storage nodes of said second binary CAM cell to said first and second match-line outputs.
18. The computer program storage medium of claim 15 , wherein said second metal overlay design further comprises said first and second match-line outputs connecting to a first search port and a second search pot, respectively, of said configured single ternary CAM cell with two search ports.
19. The computer program storage medium of claim 18 , wherein said second metal overlay design further comprises connections between inputs to data storage nodes, producing a first ternary CAM cell output and a second ternary CAM cell output, and said first and second match-line outputs, respectively.