Semiconductor device comprising pillar array and contact array
A semiconductor device includes: a substrate having a base and a pillar array including a plurality of pillars; a plurality of bit lines, each of which is disposed between two adjacent ones of the columns of the pillar array; a plurality of word lines, each of which is connected to a corresponding one of the rows of the pillar array; and a contact array including a plurality of bit line contacts arranged in rows and columns. The bit line contacts of each column of the contact array are embedded in the base and are electrically connected to a respective one of the bit lines. Each bit line contact intersects the respective one of the bit lines and extends between and is electrically connected to two adjacent ones of the pillars.
1. A semiconductor device comprising:
a substrate having a base and a pillar array, said pillar array including a plurality of pillars extending upwardly from said base and arranged in rows and columns, said pillars of each of said columns of said pillar array being disposed along a column direction;
a plurality of bit lines, each of which extends in the column direction and each of which is disposed between two adjacent ones of said columns of said pillar array;
a plurality of word lines, each of which extends in a row direction transverse to said column direction and each of which is electrically connected to a corresponding one of said rows of said pillar array; and
a contact array including a plurality of bit line contacts arranged in rows and columns, said bit line contacts of each of said columns of said contact array being disposed along the column direction, being embedded in said base, and being electrically connected to a respective one of said bit lines, each of said bit line contacts of each of said columns of said contact array intersecting the respective one of said bit lines and extending between and being electrically connected to two adjacent ones of said pillars.
2. The semiconductor device of claim 1 , further comprising a plurality of capacitors disposed on and connected electrically to said pillars.
3. The semiconductor device of claim 1 , wherein each of said bit line contacts of each of said columns of said contact array extends along a length direction between said two adjacent ones of said pillars, the length direction of each of said bit line contacts of each of said columns of said contact array crossing the length direction of an adjacent one of said bit line contacts of each of said columns of said contact array.
4. The semiconductor device of claim 1 , wherein each of said bit line contacts of each of said columns of said contact array extends along a length direction between said two adjacent ones of said pillars, the length direction of each of said bit line contacts of each of said columns of said contact array being parallel to the length direction of an adjacent one of said bit line contacts of each of said columns of said contact array.
5. The semiconductor device of claim 1 , wherein each of said bit lines is made from a conductive material containing a silicide of a refractory metal selected from one of titanium, tungsten, nickel and cobalt.
6. The semiconductor device of claim 1 , wherein each of said bit line contacts contains implanted ions selected from As, P, and N type ions.
7. The semiconductor device of claim 1 , wherein said substrate is a p-type or n-type silicon wafer.