Deep isolation trench structure and deep trench capacitor on a semiconductor-on-insulator substrate
Two trenches having different widths are formed in a semiconductor-on-insulator (SOI) substrate. An oxygen-impermeable layer and a fill material layer are formed in the trenches. The fill material layer and the oxygen-impermeable layer are removed from within a first trench. A thermal oxidation is performed to convert semiconductor materials underneath sidewalls of the first trench into an upper thermal oxide portion and a lower thermal oxide portion, while the remaining oxygen-impermeable layer on sidewalls of a second trench prevents oxidation of the semiconductor materials. After formation of a node dielectric on sidewalls of the second trench, a conductive material is deposited to fill the trenches, thereby forming a conductive trench fill portion and an inner electrode, respectively. The upper and lower thermal oxide portions function as components of dielectric material portions that electrically isolate two device regions.
1. A semiconductor structure comprising:
a semiconductor-on-insulator (SOI) substrate comprising a first trench and a second trench extending through a buried insulator layer of said SOI substrate and laterally spaced from each other;
a node dielectric contacting a sidewall of said second trench;
a bottom semiconductor oxide portion located in said first trench and underneath a bottom surface of said buried insulator layer and comprising an oxide of a semiconductor material of at least one semiconductor layer located underneath said buried insulator layer, said node dielectric including a dielectric material having a different composition than said oxide of said semiconductor material and contacting said at least one semiconductor layer;
a top semiconductor oxide portion located in said first trench and above a top surface of said buried insulator layer and comprising an oxide of a semiconductor material of a top semiconductor layer located above said buried insulator layer;
a first conductive material portion located in said first trench;
a second conductive material portion embedded within said node dielectric and comprising a same material as said first conductive material portion, wherein said second conductive material portion, said node dielectric, and a portion of said at least one semiconductor layer collectively constitute a trench capacitor; and
a first shallow trench isolation structure located within said first trench and comprising a dielectric material and located above said first conductive material portion, wherein a lower portion of said first shallow trench isolation structure located below a horizontal plane including a top surface of said buried insulator layer laterally protrudes outward relative vertical sidewalls of an upper portion of said first shallow trench isolation structure located above said horizontal plane.
2. The semiconductor structure of claim 1 , wherein said top semiconductor oxide portion is vertically spaced from said bottom semiconductor oxide portion by a thickness of said buried insulator layer.
3. The semiconductor structure of claim 1 , wherein topmost surfaces of said first conductive material portion and second conductive material portion are substantially planar, and are located between a level of a top surface of said buried insulator layer and a level of a bottom surface of said buried insulator layer.
4. The semiconductor structure of claim 1 , wherein said at least one semiconductor layer includes a stack, from bottom to top, of a first semiconductor layer and a second semiconductor layer, and said bottom semiconductor oxide portion extends into said first semiconductor layer, and a bottom surface of said second trench is located above a bottom surface of said second semiconductor layer.
5. The semiconductor structure of claim 4 , wherein said first semiconductor layer has a doping of a first conductivity type, said second semiconductor layer has a doping of a second conductivity type that is the opposite of the said first conductivity type.
6. The semiconductor structure of claim 1 , wherein an entire periphery of a bottom surface of said first shallow trench isolation structure coincides with an entire periphery of a top surface of said first conductive material portion.
7. The semiconductor structure of claim 6 , further comprising:
a second shallow trench isolation structure located within said second trench and overlying a portion of said node dielectric and a portion of said second conductive material portion; and
a buried strap structure located within said second trench and overlying another portion of said node dielectric and another portion of said second conductive material portion.
8. The semiconductor structure of claim 1 , further comprising a dielectric material liner in contact with sidewalls and a bottom surface of said first conductive material portion and with inner sidewalls of said bottom semiconductor oxide portion, and comprising a same material as said node dielectric.
9. The semiconductor structure of claim 1 , wherein said first conductive material portion is in direct contact with sidewalls and a bottom surface of said bottom semiconductor oxide portion.
10. The semiconductor structure of claim 1 , further comprising a dielectric material liner in contact with sidewalls and a bottom surface of said first conductive material portion and with inner sidewalls of said bottom semiconductor oxide portion, wherein said node dielectric comprises a stack of an oxygen-impermeable layer and an inner node dielectric layer comprising a same material and thickness as said dielectric material liner.
11. The semiconductor structure of claim 1 , wherein an upper portion of said first conductive material portion overlies said bottom semiconductor oxide portion.
12. The semiconductor structure of claim 1 , wherein said bottom semiconductor oxide portion and said top semiconductor oxide portion comprise thermal silicon oxide, and said node dielectric comprises at least one of silicon nitride and a dielectric metal oxide material.
13. The semiconductor structure of claim 1 , wherein said node dielectric comprises silicon nitride.
14. The semiconductor structure of claim 1 , wherein said node dielectric comprises a metal oxide dielectric material or a dielectric metallic nitride.
15. The semiconductor structure of claim 1 , wherein said node dielectric comprises at least an oxygen-impermeable layer.
16. The semiconductor structure of claim 1 , wherein each of said bottom semiconductor oxide portion and said node dielectric is in physical contact with said at least one semiconductor layer.
17. The semiconductor structure of claim 1 , wherein a portion of said first trench between a bottom surface of said buried insulator layer and a top surface of said buried insulator layer laterally protrudes relative another portion of said first trench below said bottom surface of said buried insulator layer.
18. The semiconductor structure of claim 1 , wherein an entire portion of said first trench between said bottom surface of said buried insulator layer and said top surface of said buried insulator layer has a same width as said lower portion of said first shallow trench isolation structure.
19. The semiconductor structure of claim 1 , wherein an entire portion of said first trench between said bottom surface of said buried insulator layer and said top surface of said buried insulator layer laterally protrudes relative another portion of said first trench below said bottom surface of said buried insulator layer.