IP Library Granted Patent US 8,951,839
Granted Patent B2
US 8,951,839 · App. 12/724,354 · Granted Feb 10, 2015

Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP

Inventors: Yaojian Lin (Singapore, SG); Pandi Chelvam Marimuthu (Singapore, SG)
Assignee: STATS ChipPAC, Ltd.
H01L23/5389H01L21/568H01L23/49816H01L23/49827H01L24/19H01L24/20H05K1/185H01L24/11H01L2224/04105H01L2224/06182H01L2224/1132H01L2224/11334H01L2224/11462H01L2224/11464H01L2224/11849H01L2224/11901H01L2224/12105H01L2224/131H01L2224/13111H01L2224/13113H01L2224/13116H01L2224/13124H01L2224/13139H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/20H01L2224/2101H01L2224/211H01L2224/215H01L2224/221H01L2924/01004H01L2924/01013H01L2924/01029H01L2924/01073H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/09701H01L2924/01006H01L2924/01047H01L2924/01322H01L2924/014H01L2924/13091H05K2201/10674
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Quick Facts
Patent No.
US 8,951,839
App. No.
12/724,354
Granted
Feb 10, 2015
Kind
B2
Abstract

A semiconductor device has a semiconductor die mounted over the carrier. An encapsulant is deposited over the carrier and semiconductor die. The carrier is removed. A first interconnect structure is formed over the encapsulant and a first surface of the die. A second interconnect structure is formed over the encapsulant and a second surface of the die. A first protective layer is formed over the first interconnect structure and second protective layer is formed over the second interconnect structure prior to forming the vias. A plurality of vias is formed through the second interconnect structure, encapsulant, and first interconnect structure. A first conductive layer is formed in the vias to electrically connect the first interconnect structure and second interconnect structure. An insulating layer is formed over the first interconnect structure and second interconnect structure and into the vias. A discrete semiconductor component can be mounted to the first interconnect structure.

Claims (82)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first interconnect structure over the semiconductor die and the encapsulant;

forming a second interconnect structure over the encapsulant and the semiconductor die opposite the first interconnect structure;

forming a first protective layer over the second interconnect structure;

forming a via through the first protective layer, first interconnect structure, the second interconnect structure, and the encapsulant around the semiconductor die;

removing the first protective layer;

forming a first conductive layer in the via and extending over the first and second interconnect structures to electrically connect the first interconnect structure and second interconnect structure; and

forming a first insulating layer over the first interconnect structure and first conductive layer.

2. The method of claim 1 , further including

providing a second protective layer over the first interconnect structure prior to forming the via.

3. The method of claim 1 , wherein forming the first interconnect structure includes:

forming a second insulating layer over the semiconductor die and encapsulant; and

forming a second conductive layer over the second insulating layer.

4. The method of claim 1 , wherein forming the second interconnect structure includes:

forming a second insulating layer over the encapsulant and semiconductor die; and

forming a second conductive layer over the second insulating layer.

5. The method of claim 1 , further including forming the first insulating layer in the via.

6. The method of claim 1 , further including disposing a discrete semiconductor component over the first interconnect structure.

7. The method of claim 1 , further including forming a second conductive layer over the semiconductor die.

8. The method of claim 1 , further including removing a portion of the encapsulant and semiconductor die.

9. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first interconnect structure over the encapsulant and a first surface of the semiconductor die;

forming a second interconnect structure over the encapsulant and a second surface of the semiconductor die opposite the first surface of the semiconductor die;

forming a first protective layer over the first interconnect structure;

forming a via through the first protective layer, first interconnect structure, second interconnect structure, and encapsulant;

removing the first protective layer; and

forming a first conductive layer in the via to electrically connect the first interconnect structure and second interconnect structure.

10. The method of claim 9 , further including forming a second protective layer over the second interconnect structure prior to forming the via.

11. The method of claim 9 , wherein forming the first interconnect structure further includes:

forming a second insulating layer over the first surface and encapsulant;

forming a second conductive layer over the second insulating layer with electroless plating and electrolytic plating;

forming a third insulating layer over the second insulating layer and second conductive layer; and

forming a third conductive layer over the third insulating layer and second conductive layer.

12. The method of claim 9 , wherein forming the second interconnect structure further includes:

forming a second insulating layer over the encapsulant and second surface of the semiconductor die;

forming a second conductive layer over the second insulating layer with electroless plating and electrolytic plating;

forming a third insulating layer over the second insulating layer and second conductive layer; and

forming a third conductive layer over the third insulating layer and second conductive layer.

13. The method of claim 9 , further including forming the first insulating layer in the via.

14. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first interconnect structure over the encapsulant and the semiconductor die;

forming a second interconnect structure over the encapsulant and the semiconductor die opposite the first interconnect structure;

forming a first protective layer over the second interconnect structure;

forming a via through the first interconnect structure, second interconnect structure, encapsulant, and first protective layer;

removing an entirety of the first protective layer; and

forming a first conductive layer in the via to electrically connect the first interconnect structure and second interconnect structure.

15. The method of claim 14 , further including providing a second protective layer over the first interconnect structure prior to forming the via.

16. The method of claim 14 , wherein forming the first interconnect structure includes:

forming an insulating layer over the encapsulant and semiconductor die; and

forming a second conductive layer over the insulating layer.

17. The method of claim 14 , wherein forming the second interconnect structure includes:

forming an insulating layer over the encapsulant and semiconductor die; and

forming a second conductive layer over the insulating layer.

18. The method of claim 14 , further including removing a portion of the encapsulant and semiconductor die.

19. The method of claim 14 , further including forming an insulating layer in the via.

20. The method of claim 14 , further including disposing a discrete semiconductor component over the first interconnect structure.

21. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over the semiconductor die;

forming a first interconnect structure over the encapsulant and semiconductor die;

providing a first protective layer over the first interconnect structure;

forming a second interconnect structure over the encapsulant and semiconductor die opposite the first interconnect structure;

forming a second protective layer over the second interconnect structure;

forming a via through the second protective layer, first interconnect structure, encapsulant, second interconnect structure and into the first protective layer;

removing an entirety of the first protective layer;

removing an entirety of the second protective layer; and

forming a conductive layer in the via and extending over the first and second interconnect structures to electrically connect the first and second interconnect structures.

22. The method of claim 21 , wherein forming the first interconnect structure includes:

forming an insulating layer over the semiconductor die; and

forming a first conductive layer over the insulating layer.

23. The method of claim 21 , wherein forming the second interconnect structure includes:

forming an insulating layer over the semiconductor die; and

forming a first conductive layer over the insulating layer.

24. The method of claim 21 , further including forming an insulating layer in the via.

25. The method of claim 21 , further including disposing a discrete semiconductor component over the first interconnect structure.

26. The method of claim 21 , further including removing a portion of the encapsulant and semiconductor die.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0145. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0145 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2010
From: LIN, YAOJIAN; MARIMUTHU, PANDI CHELVAM
To: STATS CHIPPAC, LTD.
Reel/Frame 024083/0398 →
Continuity (1)
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