Thermal leadless array package with die attach pad locking feature
Embodiments of the present invention are directed to a thermal leadless array package with die attach pad locking feature and methods of producing the same. A copper layer is half-etched on both surfaces to define an array of package contacts and a die attach pad. Each die attach pad is fully embedded in encapsulate material to provide a positive mechanical locking feature for better reliability. In some embodiments, the contacts include four active corner contacts.
1. A method of fabricating a semiconductor package comprising:
etching a leadframe to form a plurality of tie bars, a plurality of contacts and a die attach pad coupled to a portion of the plurality of contacts via the plurality of tie bars, and to form a plurality of areas around the die attach pad that are etched through the leadframe;
selectively plating a top surface of the leadframe;
laminating the bottom surface of the leadframe with tape;
preparing the semiconductor package;
etching a bottom surface of the leadframe to isolate the plurality of contacts from the die attach pad; and
singulating the semiconductor package.
2. The method of claim 1 , wherein the top surface is plated with Ag, a stack-up of Ni, Pd and Au, NiPdAu alloy, NiAu, or NiAu alloy.
3. The method of claim 1 , further comprising, after preparing the semiconductor package, removing the tape from the bottom surface of the leadframe.
4. The method of claim 3 , further comprising, after etching the bottom surface of the leadframe, selectively applying solderable material to the bottom surface of the leadframe.
5. The method of claim 4 , wherein the solderable material is Sn, NiAu, NiPdAu, Ag, SnPb, SnAgCu, SnAgCuNi, or Pb-free compositions.
6. The method of claim 1 , wherein preparing the semiconductor package includes:
coupling a die to the die attach pad;
wirebonding the die to the plurality of contacts; and
encapsulating the die attach pad, the plurality of contacts, the die and wirebonds.
7. The method of claim 1 , wherein the portion of the mold compound forming the lower bottom surface extends from the die attach pad to the inner row of contacts.
8. A method of fabricating a semiconductor package comprising:
etching a leadframe to form a plurality of tie bars, a plurality of contacts, and a die attach pad coupled to a portion of the plurality of contacts via the plurality of tie bars, and to form a plurality of areas around the die attach pad that are etched through the leadframe;
preparing the semiconductor package;
etching a bottom surface of the leadframe to isolate the plurality of contacts from the die attach pad; and
singulating the semiconductor package, wherein the singulated semiconductor package comprises:
a lower bottom surface aligned with a first level and formed by the bottom of the die attach pad and a first portion of the mold compound; and
an upper bottom surface aligned with a second level higher than the first level and formed at least partially by a second portion of the mold compound;
wherein, between the die attach pad and the inner row of contacts, the bottom of the mold compound includes a step between the first level and the second level.
9. A method of fabricating a semiconductor package comprising:
etching a leadframe to form a plurality of tie bars, a plurality of contacts and a die attach pad coupled to a portion of the plurality of contacts via the plurality of tie bars, and to form a plurality of areas around the die attach pad that are etched through the leadframe, wherein the plurality of contacts include one or more corner contacts located on the vertex of one or more of the corners of the leadframe;
preparing the semiconductor package including coupling a die to the die attach pad;
etching a bottom surface of the leadframe including the tie bars to isolate the plurality of contacts including the corner contacts from the die attach pad;
electrically coupling the die to at least one of the corner contacts; and
singulating the semiconductor package;
wherein each of the tie bars extend from a corner of the die attach pad to one of the corner contacts.
10. The method of claim 1 , wherein all contacts are not exposed at sides of the semiconductor package.
11. The method of claim 1 , wherein all contacts are exposed at sides of the semiconductor device.