IP Library › Granted Patent US 9,430,344
Granted Patent B2
US 9,430,344 · App. 14/057,427 · Granted Aug 30, 2016

Memory system for mirroring data

Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary (Bangalore, IN); Kyu-hyoun Kim (Mount Kisco, NY); Gary A. Tressler (Sandy Hook, CT)
Assignee: GLOBALFOUNDRIES Inc.
G06F11/2058G06F11/1666G11C14/009G06F11/2015
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Quick Facts
Patent No.
US 9,430,344
App. No.
14/057,427
Filed
Oct 18, 2013
Granted
Aug 30, 2016
Kind
B2
Art Unit
2133
USPC
711/103
Abstract

A memory system is disclosed, which may include a memory unit of a first type, susceptible to loss of data from corrupting events, and a memory unit of a second type, less susceptible to loss of data from corrupting events than the memory unit of the first type, and a mirrored memory interface (MMI). The MMI may be coupled to a memory controller, the memory unit of the first type, and the memory unit of the second type. The MMI may, in response to a memory controller write command, receive data from the memory controller and write the data to the memory unit of the first type and to the memory unit of the second type. The MMI may also, in response to a memory controller read command, read data from the memory unit of the first type and send the data to the memory controller.

Claims (15)

1. A method for operating a mirrored memory system, comprising:

receiving a write command and data from a memory controller;

writing the data into a first memory unit of a first type, in response to receiving the write command, wherein the first type of memory is a volatile memory susceptible to a loss of data in response to a loss of a power supply voltage supplying power to the mirrored memory system;

writing the data into a second memory unit of a second type, in response to receiving the write command, wherein the second type of memory is a non-volatile memory less susceptible to the loss of data in response to the loss of the power supply voltage than the first memory units, the received data is continuously mirrored in the first and second memory units so that the first memory unit contains a duplicate copy of all the data in the second memory unit, and the second memory unit contains the duplicate copy of all the data in the first memory unit;

receiving a read command from the memory controller;

selecting one of the first memory unit or the second memory unit, in response to receiving the read command;

reading data from the selected memory unit, in response to receiving the read command; and

sending the data read from the selected memory unit to the memory controller; wherein the first memory unit is coupled to the memory controller through a first memory bus having a first throughput rate,

the second memory unit is coupled to the memory controller through a second memory bus having a second throughput rate lower than the first throughput rate,

writing the data into the first memory unit comprises writing uncompressed data into the first memory unit at the first throughput rate, and

writing the data into the second memory unit comprises compressing the data to reduce a memory bandwidth requirement of the second memory bus so that the data is written into the second memory unit at an effective throughput rate equal to the first throughput rate.

2. The method of claim 1 , wherein writing the data into the second memory unit is a parallel operation that mirrors the data written into the first memory unit, and allows recovery of the data written into the first memory unit from the second memory unit.

3. The method of claim 1 , where a storage capacity of the second memory unit is sufficient to mirror the data contained in the first memory unit.

4. The method of claim 1 , wherein the read command from the memory controller is a recovery read operation, and the data from the second memory unit is sent to the memory controller.

5. The method of claim 1 , further comprising performing a parallel write of the data into the first memory unit and into the second memory unit, and recovering the data written into the first memory unit from the second memory unit.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2013
From: CHINNAKKONDA VIDYAPOORNACHARY, DIYANESH B.; KIM, KYU-HYOUN; TRESSLER, GARY A.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 031435/0464 →
Continuity (2)
Continuation 14043110 · Oct 1, 2013
Related Publication 20150095693A1 · Apr 2, 2015