Trapping dislocations in high-mobility fins below isolation layer
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a high-mobility fin field effect transistor (finFET) fin in a silicon semiconductor on insulator (SOI) substrate by trapping crystalline lattice dislocations that occur during epitaxial growth in a recess formed in a semiconductor layer. The crystalline lattice dislocations may remain trapped below a thin isolation layer, thereby reducing device thickness and the need for high-aspect ratio etching and fin formation.
1. A method comprising:
forming a recess in a semiconductor on insulator (SOI) substrate, the recess located in a semiconductor layer and below an isolation layer; and
epitaxially growing a material having high electron mobility properties in the recess to form a high-mobility fin, the high-mobility fin having one or more crystalline lattice dislocations only in the recess, and the high-mobility fin extending above the isolation layer,
wherein the forming the recess in the SOI substrate comprises:
removing a fin to expose a portion of the isolation layer, wherein the fin comprises a portion of an SOI layer;
removing the portion of the isolation layer to expose the semiconductor layer; and
removing a portion of the semiconductor layer directly below the portion of the isolation layer.
2. The method of claim 1 , wherein the removing the portion of the semiconductor layer directly below the portion of the isolation layer comprises:
performing a wet etching process to form a faceted recess.
3. The method of claim 1 , wherein the removing the fin to expose the portion of the isolation layer comprises:
depositing a filler material on the isolation layer adjacent to the fin, the filler material in direct contact with a sidewall of fin; and
removing the fin selective to the filler material.
4. The method of claim 3 , wherein the depositing the filler material on the isolation layer adjacent to the fin comprises:
depositing a glass material on the isolation layer.
5. The method of claim 3 , wherein the depositing the filler material on the isolation layer adjacent to the fin comprises:
depositing an oxide on the isolation layer.
6. The method of claim 1 , wherein the epitaxially growing the material having high electron mobility properties in the recess to form the high-mobility fin comprises:
growing an epitaxial material comprising germanium on a surface of the semiconductor layer exposed by the recess.
7. The method of claim 1 , wherein the isolation layer is a thin isolation layer having a thickness ranging from approximately 10 nm to approximately 300 nm.
8. A method comprising:
forming a fin on an isolation layer, the fin comprising a portion of a semiconductor on insulator (SOI) layer;
forming a hardmask on the fin;
depositing a filler material on the isolation layer adjacent to the fin, the filler material directly contacting a sidewall of the fin and a sidewall of the hardmask;
forming a patterning layer on the hardmask and the filler material;
forming an opening in the patterning layer, the opening exposing the hardmask and only a portion of the filler material;
forming a fin trench by removing the hardmask, the fin, and a portion of the isolation layer below the fin selective to the filler material, the fin trench exposing a portion of a semiconductor layer;
forming a recess in the exposed portion of the semiconductor layer, the recess located below the isolation layer; and
epitaxially growing a material having high electron mobility properties in the recess to form a high-mobility fin, the high-mobility fin having one or more crystalline lattice dislocations located only in the recess, and the high-mobility fin extending above the isolation layer.
9. The method of claim 8 , further comprising:
removing the patterning layer;
removing the hardmask; and
removing the filler material selective to the high-mobility fin and the isolation layer.
10. The method of claim 8 , wherein the forming the hardmask on the fin comprises:
forming a first layer on the fin; and
forming a second layer on the first layer.
11. The method of claim 8 , wherein the isolation layer is a thin isolation layer having a thickness ranging from approximately 10 nm to approximately 300 nm.
12. The method of claim 8 , wherein the forming the recess in the exposed portion of the semiconductor layer comprises:
removing a portion of the semiconductor layer using a wet etching process to form a faceted recess.
13. The method of claim 8 , wherein the epitaxially growing the material having high electron mobility properties in the recess to form the high-mobility fin comprises:
growing an epitaxial material comprising germanium on a surface of the semiconductor layer exposed by the recess.
14. The method of claim 8 , wherein the depositing the filler material on the isolation layer adjacent to the fin comprises:
depositing a glass material on the isolation layer and the hardmask; and
planarizing the glass material.
15. The method of claim 8 , wherein the depositing the filler material on the isolation layer adjacent to the fin comprises:
depositing an oxide on the isolation layer and the hardmask; and
planarizing the oxide.