IP Library › Granted Patent US 9,535,438
Granted Patent B2
US 9,535,438 · App. 14/328,368 · Granted Jan 3, 2017

Fast response pulse width modulation control for switching regulator

Inventors: Henry H. Yuan (San Ramon, CA); Steve X. Chi (Cupertino, CA); Ekram H. Bhuiyan (San Jose, CA)
Assignee: SanDisk Technologies LLC
G05F1/575G05F1/46H02M3/156H02M2001/0025
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,535,438
App. No.
14/328,368
Granted
Jan 3, 2017
Kind
B2
Abstract

A switching rectifier circuit includes a pulse width modulation controller, a voltage switching circuit, a pulse width modulation comparator, an error amplifier, a voltage reference, a high threshold voltage comparator and a low threshold voltage comparator. A varying output voltage of the voltage regulator is sampled and compared to a high threshold voltage reference and a low threshold voltage reference. When the sampled output voltage is equal to or greater than the high threshold voltage reference the output voltage is decreased. When the sampled output voltage is equal to or less than the low threshold voltage reference the output voltage is increased.

Claims (51)

1. A switching rectifier circuit comprising:

a voltage input coupled to a positive amplification device and a negative amplification device, the positive amplification device and the negative amplification device coupled in series;

a voltage output node on a common output of the positive amplification device and the negative amplification device;

a pulse width modulation controller coupled to the positive amplification device and the negative amplification device, the pulse width modulation controller including a set input and a reset input;

a voltage switching circuit having a voltage switching circuit output and a clock signal input;

a pulse width modulation comparator coupled between the voltage switching circuit output and the pulse width modulation controller;

an error amplifier having an error amplifier output coupled to the pulse width modulation comparator;

a voltage reference having an output coupled to the error amplifier;

a high threshold voltage comparator including:

a high threshold voltage reference;

a first high threshold voltage comparator input coupled to the high threshold voltage reference;

a second high threshold voltage comparator input coupled to the output voltage; and

a high threshold voltage comparator output coupled to the pulse width modulation controller reset input;

a low threshold voltage comparator including:

a low threshold voltage reference;

a first low threshold voltage comparator input coupled to the low threshold voltage reference;

a second low threshold voltage comparator input coupled to the output voltage; and

a low threshold voltage comparator output coupled to the pulse width modulation controller set input.

2. The switching rectifier circuit of claim 1 , wherein the high threshold voltage comparator further includes an immediate reset pulse generator having an immediate reset pulse generator input coupled to an output of a comparison of the high threshold voltage reference and the feedback voltage divider output.

3. The switching rectifier circuit of claim 1 , wherein the low threshold voltage comparator further includes an immediate set pulse generator having an immediate set pulse generator input coupled to an output of a comparison of the low threshold voltage reference and the feedback voltage divider output.

4. The switching rectifier circuit of claim 1 , further comprising:

a current switching circuit;

a summation circuit coupled between the voltage switching circuit output and the pulse width modulation comparator, the summation circuit including:

a first summation circuit input coupled to the voltage switching circuit output; and

a second summation circuit input coupled to the current switching circuit.

5. The switching rectifier circuit of claim 4 , wherein the summation circuit further includes an increase pulse width modulation ramp input coupled to a comparison of the high threshold voltage reference and the feedback voltage divider output.

6. The switching rectifier circuit of claim 4 , wherein the summation circuit further includes a decrease pulse width modulation ramp input coupled to a comparison of the low threshold voltage reference and the feedback voltage divider output.

7. The switching rectifier circuit of claim 1 , wherein the pulse width modulation controller includes:

a first pulse width modulation controller output coupled to the positive amplification device;

a second pulse width modulation controller output coupled to the negative amplification device; and

a pulse width modulation controller input.

8. A method of regulating a voltage comprising:

sampling a varying output voltage of the voltage regulator;

comparing the sampled output voltage to a high threshold voltage reference;

decreasing the output voltage of the voltage regulator when the sampled output voltage is equal to or greater than the high threshold voltage reference wherein decreasing the output voltage includes increasing a pulse width modulating ramp signal; and

increasing the output voltage of the voltage regulator when the sampled output voltage is equal to or less than the low threshold voltage reference wherein increasing the output voltage includes decreasing the pulse width modulating ramp signal.

9. The method of claim 8 , wherein sampling the output voltage includes dividing the output voltage in a feedback voltage divider.

10. The method of claim 8 , wherein increasing the increasing pulse width modulating ramp signal and the decreasing pulse width modulating ramp signal are combined in a summation circuit to modify a pulse width modulation ramp signal to form a combined pulse width modulation ramp signal.

11. The method of claim 8 , wherein decreasing the output voltage includes decreasing a duty cycle of the voltage regulator.

12. The method of claim 10 , further comprising inputting the combined pulse width modulation ramp signal and a pulse width modulator control signal in a pulse width modulation comparator to produce a control input to the pulse width modulation control.

13. The method of claim 8 , wherein increasing the output voltage includes increasing a duty cycle of the voltage regulator.

14. A switching regulator circuit comprising:

a pulse width modulation controller having a high control input and a low control input;

a high threshold voltage comparator circuit having a first output coupled to the high control input, the high threshold voltage comparator circuit configured to compare a high threshold voltage reference and an output voltage of the switching regulator and output a reset signal to the high control input of the pulse width modulation controller when the output voltage is equal to or greater than the high threshold voltage reference wherein the set signal includes increasing a pulse width modulating ramp signal; and

a low threshold voltage comparator circuit having a second output coupled to the low control input, the low threshold voltage comparator circuit configured to compare a low threshold voltage reference and the output voltage and output a set signal to the low control input of the pulse width modulation controller when the output voltage is equal to or less than the low threshold voltage reference wherein the reset signal includes decreasing the pulse width modulating ramp signal.

15. The circuit of claim 14 , wherein the high threshold voltage comparator circuit includes an immediate reset pulse generator configured to immediately generate the reset signal when the output voltage is equal to or greater than the high threshold voltage reference.

16. The circuit of claim 15 , wherein the pulse width modulation controller is configured to decrease a duty cycle of the switching regulator in response to the output reset signal from the high threshold voltage comparator circuit, independent from a switching frequency of the switching regulator.

17. The circuit of claim 16 , wherein decreasing the duty cycle of the switching regulator decreases the output voltage of the switching regulator.

18. The circuit of claim 14 , wherein the low threshold voltage comparator circuit includes an immediate set pulse generator configured to immediately generate the set signal when the output voltage is equal to or less than the low threshold voltage reference.

19. The circuit of claim 18 , wherein the pulse width modulation controller is configured to increase a duty cycle of the switching regulator in response to the output set signal from the low threshold voltage comparator circuit, independent from the switching frequency of the switching regulator.

20. The circuit of claim 18 , wherein increasing the duty cycle of the switching regulator increases the output voltage.

Assignments (5)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2014
From: YUAN, HENRY H.; CHI, STEVE X.; BHUIYAN, EKRAM H.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 033337/0681 →
Continuity (1)
Related Publication 20160011611A1 · Jan 14, 2016