IP Library Granted Patent US 9,640,504
Granted Patent B2
US 9,640,504 · App. 14/224,931 · Granted May 2, 2017

Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core

Inventors: Reza A. Pagaila (Tangerang, ID); Byung Tai Do (Singapore, SG); Shuangwu Huang (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L24/18H01L21/568H01L21/6835H01L23/3128H01L23/528H01L23/5283H01L23/5389H01L24/19H01L24/97H01L25/105H01L25/16H01L2221/68345H01L2224/04105H01L2224/12105H01L2224/20H01L2224/48091H01L2224/73265H01L2224/97H01L2225/1035H01L2225/1041H01L2225/1058H01L2924/0103H01L2924/01004H01L2924/014H01L2924/01006H01L2924/01013H01L2924/01024H01L2924/01029H01L2924/01047H01L2924/01061H01L2924/01073H01L2924/01074H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01322H01L2924/04953H01L2924/09701H01L2924/12041H01L2924/12042H01L2924/12044H01L2924/1306H01L2924/13091H01L2924/14H01L2924/1433H01L2924/15311H01L2924/15331H01L2924/181H01L2924/1902H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/30105
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Quick Facts
Patent No.
US 9,640,504
App. No.
14/224,931
Filed
Mar 25, 2014
Granted
May 2, 2017
Kind
B2
Art Unit
2899
USPC
257/773
Abstract

A semiconductor device is made by providing a sacrificial substrate and depositing an adhesive layer over the sacrificial substrate. A first conductive layer is formed over the adhesive layer. A polymer pillar is formed over the first conductive layer. A second conductive layer is formed over the polymer pillar to create a conductive pillar with inner polymer core. A semiconductor die or component is mounted over the substrate. An encapsulant is deposited over the semiconductor die or component and around the conductive pillar. A first interconnect structure is formed over a first side of the encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The sacrificial substrate and adhesive layers are removed. A second interconnect structure is formed over a second side of the encapsulant opposite the first interconnect structure. The second interconnect structure is electrically connected to the conductive pillar.

Claims (42)

1. A method of making a semiconductor device, comprising:

providing a first conductive layer;

forming a plurality of polymer pillars over the first conductive layer;

forming a second conductive layer over the polymer pillars to form a plurality of conductive z-interconnect structures; and

disposing a semiconductor die between the conductive z-interconnect structures and contacting the first conductive layer.

2. The method of claim 1 , further including forming a first interconnect structure over the conductive z-interconnect structures.

3. The method of claim 2 , further including forming a second interconnect structure over the conductive z-interconnect structures opposite the first interconnect structure.

4. The method of claim 1 , further including:

depositing an encapsulant around the conductive z-interconnect structures; and

forming a build-up interconnect layer over a surface of the encapsulant and electrically connected to the conductive z-interconnect structures.

5. The method of claim 4 , further including forming an integrated passive device in the build-up interconnect layer.

6. The method of claim 5 , further including configuring the integrated passive device to operate as a capacitor, resistor, or inductor.

7. A method of making a semiconductor device, comprising:

providing a conductive layer;

forming a first conductive z-interconnect structure and second conductive z-interconnect structure each in contact with the conductive layer and including an inner polymer core within the first conductive z-interconnect structure and second conductive z-interconnect structure; and

disposing a semiconductor die between the first conductive z-interconnect structure and second conductive z-interconnect structure and contacting the conductive layer.

8. The method of claim 7 , further including forming the inner polymer core in a prolate spheroid shape.

9. The method of claim 7 , further including:

depositing an encapsulant around the first conductive z-interconnect structure and second conductive z-interconnect structure; and

forming a build-up interconnect layer over a surface of the encapsulant and electrically connected to the first conductive z-interconnect structure and second conductive z-interconnect structure.

10. The method of claim 9 , further including forming an integrated passive device in the build-up interconnect layer.

11. The method of claim 10 , further including configuring the integrated passive device to operate as a capacitor, resistor, or inductor.

12. A semiconductor device, comprising:

a conductive layer;

a plurality of conductive z-interconnect structures including an inner polymer core formed over the conductive layer; and

a semiconductor die disposed between the conductive z-interconnect structures and contacting the conductive layer.

13. The semiconductor device of claim 12 , wherein the inner polymer core includes a prolate spheroid shape.

14. The semiconductor device of claim 12 , further including:

an encapsulant deposited around the conductive z-interconnect structures; and

a build-up interconnect layer formed over a surface of the encapsulant and electrically connected to the conductive z-interconnect structures.

15. The semiconductor device of claim 14 , further including an integrated passive device formed in the build-up interconnect layer.

16. The semiconductor device of claim 15 , wherein the integrated passive device is configured to operate as a capacitor, resistor or inductor.

17. A semiconductor device, comprising:

a conductive layer;

a first conductive z-interconnect structure including a first inner polymer core formed in contact with the conductive layer;

a second conductive z-interconnect structure including a second inner polymer core formed in contact with the conductive layer; and

a semiconductor die disposed between the first conductive z-interconnect structure and second conductive z-interconnect structure and contacting the conductive layer.

18. The semiconductor device of claim 17 , wherein the first inner polymer core includes a prolate spheroid shape.

19. The semiconductor device of claim 17 , further including:

an encapsulant deposited around the first conductive z-interconnect structure and second conductive z-interconnect structure; and

a build-up interconnect layer formed over a surface of the encapsulant and electrically connected to the first conductive z-interconnect structure and second conductive z-interconnect structure.

20. The semiconductor device of claim 19 , further including an integrated passive device formed in the build-up interconnect layer.

Assignments (4)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (3)
Continuation 13405094 · Feb 24, 2012
Division 12406049 · Mar 17, 2009
Related Publication 20140203443A1 · Jul 24, 2014