IP Library › Granted Patent US 9,965,199
Granted Patent B2
US 9,965,199 · App. 13/973,162 · Granted May 8, 2018

Smart dynamic wear balancing between memory pools

Inventors: Gautham Reddy (San Jose, CA); Nian Niles Yang (Mountain View, CA); Alexandra Bauche (San Jose, CA); Nagdi Tafish (Santa Clara, CA); Michael Zhu (San Jose, CA)
Assignee: SanDisk Technologies LLC
G06F3/0616G06F3/064G06F3/0679G06F3/0685G06F12/0246G11C16/349G11C29/82G06F2212/1036G06F2212/7211
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Quick Facts
Patent No.
US 9,965,199
App. No.
13/973,162
Granted
May 8, 2018
Kind
B2
Abstract

A memory system or flash card may include a dynamic system-level process for the management of blocks in the different memory pools. There may be spare blocks available to the pools that are over provisioned to the pool which increases the efficiency of data compaction and helps reduce the average hot count for that pool and compensate for the grown defects. The block wear and grown defects in each memory pool may be tracked so that remaining spare blocks can be re-allocated.

Claims (35)

1. A flash memory device comprising:

a non-volatile storage having an array of memory blocks storing data; and

a controller in communication with the non-volatile storage, the controller is configured for:

categorizing the array of memory blocks into two or more memory pools comprising at least one low-usage memory pool characterized by a first endurance limit and at least one high-usage memory pool characterized by a second endurance limit different from the first endurance limit, wherein spare blocks of the array of memory blocks are allocatable to one or more of the two or more memory pools;

monitoring usage of the array of memory blocks by comparing a first ratio between a first average access counts for the memory blocks in the at least one low-usage memory pool and the first endurance limit with a second ratio between a second average access counts for the memory blocks of the at least one high-usage memory pool and the second endurance limit;

subtracting the first ratio from the second ratio to obtain a difference between the second ratio and the first ratio; and

re-allocating the spare blocks of the array of memory blocks between the two or more memory pools when the difference between the second ratio and the first ratio is larger than a predetermined threshold.

2. The flash memory device of claim 1 wherein the at least one low-usage memory pool comprises multi-level cell (MLC) memory and the at least one high-usage memory pool comprises single-level cell (SLC) memory.

3. The flash memory device of claim 2 wherein the re-allocating the spare blocks of the array of memory blocks comprises transferring the spare blocks of the array of memory blocks from the MLC memory to the SLC memory.

4. The flash memory device of claim 1 wherein the re-allocating the spare blocks of the array of memory blocks comprises allocating the spare blocks of the array of memory blocks from the at least one low-usage memory pool to the at least one high-usage memory pool.

5. The flash memory device of claim 1 wherein the first ratio and the second ratio comprise an amount of wear on the array of memory blocks.

6. The flash memory device of claim 1 wherein the categorizing of the array of memory blocks comprises categorizing the array of memory blocks into the at least one high-usage memory pool, a medium-usage memory pool, and the at least one low-usage memory pool.

7. A flash memory device comprising:

a non-volatile storage having an array of memory blocks storing data; and

a controller in communication with the non-volatile storage, the controller is configured for:

categorizing the array of memory blocks into two or more memory pools comprising at least one low-usage memory pool characterized by a first endurance limit and at least one high-usage memory pool characterized by a second endurance limit different from the first endurance limit, wherein spare blocks of the array of memory blocks are allocatable to one or more of the two or more memory pools;

monitoring usage of the array of memory blocks;

comparing a first ratio between a first average access counts for the array of memory blocks in the at least one low-usage memory pool and the first endurance limit with a second ratio between a second average access counts for the array of memory blocks in the at least one high-usage memory pool and the second endurance limit;

subtracting the first ratio from the second ratio to obtain a difference between the second ratio and the first ratio; and

re-allocating the spare blocks of the array of memory blocks from the at least one low-usage memory pool to the at least one high-usage memory pool when the difference between the second ratio and the first ratio is larger than a predetermined threshold.

8. The flash memory device of claim 7 , wherein the predetermined threshold comprises a relative life left that ensures that both of the at least one low-usage memory pool and the at least one high-usage memory pool have equal usage.

9. The flash memory device of claim 8 , wherein the relative life left comprises a comparison between remaining life for each of the at least one low-usage memory pool and at least one high usage memory pool.

10. A method for monitoring rewrites in a flash memory device comprising:

in a non-volatile storage device having a controller and memory blocks, the controller:

initially allocating all spare blocks of the memory blocks to a lower usage memory pool of a plurality of memory pools, the plurality of memory pools comprising the lower usage memory pool characterized by a first endurance limit and a higher usage memory pool characterized by a second endurance limit different from the first endurance limit;

tracking a first ratio between a first average access counts for the memory blocks of the lower usage memory pool of the plurality of memory pools and the first endurance limit with a second ratio between a second average access counts for the memory blocks of the higher usage memory pool of the plurality of the memory pools and the second endurance limit;

subtracting the first ratio from the second ratio to obtain a difference between the second ratio and the first ratio; and

re-allocating the spare blocks of the memory blocks between the plurality of memory pools when the difference between the second ratio and first ratio is larger than a predetermined threshold.

11. The method of claim 10 wherein the lower usage memory pool comprises multi-level cell (MLC) memory and the higher usage memory pool comprises single-level cell (SLC) memory.

12. The method of claim 11 wherein the re-allocating comprises transferring the spare blocks of the memory blocks from the MLC memory to the SLC memory.

13. The method of claim 10 wherein the re-allocating the spare blocks of the memory blocks comprises allocating the spare blocks of the memory blocks from the lower usage memory pool to the higher usage memory pool.

14. The method of claim 10 wherein the predetermined threshold comprises a relative life left that ensures that both of the lower usage memory pool and the higher usage memory pool have equal usage, wherein the relative life left comprises a comparison between remaining relative life for each of the lower usage memory pool and the higher usage memory pool.

15. The method of claim 10 wherein the plurality of memory pools further comprises the higher usage memory pool, a medium-usage memory pool, and the lower usage memory pool, further wherein the re-allocating is to those memory pools with higher usage.

16. The method of claim 15 wherein the spare blocks of the memory blocks from the lower usage memory pool are re-allocated to at least the medium-usage memory pool, and where the spare blocks of the memory blocks from the medium-usage memory pool are re-allocated to the higher usage memory pool.

17. The method of claim 10 wherein the the first ratio and second ratio comprise an amount of wear on the memory blocks.

Assignments (5)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2013
From: REDDY, GAUTHAM; YANG, NIAN NILES; BAUCHE, ALEXANDRA; TAFISH, NAGDI; ZHU, MICHAEL
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 031068/0211 →
Continuity (1)
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