IP Library › Granted Patent US 9,972,694
Granted Patent B2
US 9,972,694 · App. 15/178,150 · Granted May 15, 2018

Atomic layer deposition methods and structures thereof

Inventors: Hsin-Yi Lee (Hsinchu, TW); Cheng-Yen Tsai (New Taipei, TW); Da-Yuan Lee (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L29/4966H01L21/28088H01L21/28097H01L21/28518H01L21/28556H01L21/28568H01L21/67167H01L27/0886H01L29/517H01L29/518
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,972,694
App. No.
15/178,150
Granted
May 15, 2018
Kind
B2
Abstract

A method and structure for providing a pre-deposition treatment (e.g., of a work-function layer) to accomplish work function tuning. In various embodiments, a gate dielectric layer is formed over a substrate, and a work-function metal layer is deposited over the gate dielectric layer. The work-function metal layer has a first thickness. A pre-treatment process of the work-function metal layer may then performed, where the pre-treatment process removes an oxidized layer from a top surface of the work-function metal layer to form a treated work-function metal layer. The treated work-function metal layer has a second thickness less than the first thickness. In various embodiments, after performing the pre-treatment process, another metal layer is deposited over the treated work-function metal layer.

Claims (34)

1. A method of semiconductor device fabrication, comprising:

forming a gate dielectric layer over a substrate;

depositing a work-function metal layer over the gate dielectric layer, wherein the work-function metal layer has a first thickness;

performing a pre-treatment process of the work-function metal layer, wherein the pre-treatment process removes an oxidized portion of the work-function metal layer from a top surface of the work-function metal layer to form a treated work-function metal layer, and wherein the treated work-function metal layer has a second thickness less than the first thickness; and

after performing the pre-treatment process, depositing a TiAlC layer over the treated work-function metal layer.

2. The method of claim 1 , wherein the depositing the TiAlC layer is performed sequentially after the pre-treatment process while maintaining the substrate under a vacuum condition.

3. The method of claim 1 , wherein the pre-treatment process includes a precursor selected from the group consisting of: TiCl x , TaCl x , TiF x , HfCl x , WF x , and WCl x , wherein x is between approximately 1 and approximately 6.

4. The method of claim 1 , wherein the work-function metal layer includes at least one of TiN, TaN, TiAlC, TiAl, TiSiN, TaSi, and TiAlN.

5. The method of claim 1 , wherein the work-function metal layer and the TiAlC layer are deposited by atomic layer deposition.

6. The method of claim 1 , further comprising depositing a TiN layer over the TiAlC layer.

7. The method of claim 1 , wherein the pre-treatment process shifts a band edge of the work-function metal layer.

8. The method of claim 1 , wherein the second thickness is at least thirty percent less than the first thickness.

9. A method of semiconductor device fabrication, comprising:

forming a work-function metal layer over a gate dielectric layer, wherein the work-function metal layer has a first thickness;

oxidizing a surface layer of the work-function metal layer;

removing the oxidized surface layer in a first chamber of a processing system, thereby forming a thinned work-function metal layer, wherein the thinned work-function metal layer has a second thickness less than the first thickness; and

while maintaining a vacuum condition of the processing system, depositing a subsequent metal layer over the thinned work-function metal layer in a second chamber of the processing system.

10. The method of claim 9 , wherein the removing the oxidized surface layer further includes removing the oxidized surface layer by way of a thermal chemical reaction between the oxidized surface layer and a precursor selected from the group consisting of: TiCl x , TaCl x , TiF x , HfCl x , WF x , and WCl x , wherein x is between approximately 1 and approximately 6.

11. The method of claim 9 , wherein the work-function metal layer includes at least one of TiN, TaN, TiAlC, TiAl, TiSiN, TaSi, and TiAlN.

12. The method of claim 9 , wherein the work-function metal layer is deposited at a temperature from approximately 200 degrees Celsius to approximately 600 degrees Celsius.

13. The method of claim 10 , wherein the thermal chemical reaction is performed at a temperature from approximately 300 degrees Celsius to approximately 1000 degrees Celsius, and wherein a flow rate of the precursor is between approximately 100 sccm and 8000 sccm.

14. The method of claim 9 , wherein the work-function metal layer includes an N-type work function metal layer.

15. The method of claim 14 , wherein the removing the oxidized surface layer shifts a conduction band edge of the N-type work-function metal layer.

16. A method of semiconductor device fabrication, comprising:

forming a gate stack over a substrate, wherein the forming the gate stack comprises:

depositing a work-function metal layer, wherein the work-function metal layer has a first thickness;

tuning a work-function value of the work-function metal layer by performing a pre-treatment process of the work-function metal layer, wherein the treated work-function metal layer has a second thickness less than the first thickness; and

after tuning the work-function value of the work-function metal layer, depositing another metal layer over the treated work-function metal layer.

17. The method of claim 16 , wherein the forming the gate stack further comprises:

prior to depositing the work-function metal layer, forming a gate dielectric layer over the substrate; and

depositing the work-function metal layer over the gate dielectric layer.

18. The method of claim 16 , wherein the depositing another metal layer is performed sequentially after the tuning the work-function value while maintaining the substrate under a vacuum condition.

19. The method of claim 16 , wherein the pre-treatment process removes an oxidized layer from a top surface of the work-function metal layer to form the treated work-function metal layer.

20. The method of claim 16 , wherein the pre-treatment process includes a precursor selected from the group consisting of: TiCl x , TaCl x , TiF x , HfCl x , WF x , and WCl x , wherein x is between approximately 1 and approximately 6.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE NAME OF THE RECEIVING PARTY DATA FROM TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. PREVIOUSLY RECORDED ON REEL 039295 FRAME 0929. ASSIGNOR(S) HEREBY CONFIRMS THE RECEIVING PARTY DATA NAME BE CHANGED TO TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.. Recorded Sep 20, 2016
From: LEE, HSIN-YI; TSAI, CHENG-YEN; LEE, DA-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 040092/0733 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2016
From: LEE, HSIN-YI; TSAI, CHENG-YEN; LEE, DA-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 039458/0257 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2016
From: LEE, HSIN-YI; TSAI, CHENG-YEN; LEE, DA-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 039295/0929 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2016
From: LEE, HSIN-YI; TSAI, CHENG-YEN; LEE, DA-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 039132/0238 →
Continuity (2)
Provisional Application 62244103 · Oct 20, 2015
Related Publication 20170110552A1 · Apr 20, 2017