Wiring substrate and semiconductor device
A wiring component electrically connects a first semiconductor element, including first and second electrode terminals, and a second semiconductor element, including third and fourth electrode terminals. The wiring component includes first and second connection terminals respectively connected to the first and third electrode terminals. A third connection terminal is connected to the second electrode terminal, and a fourth connection terminal is connected to the fourth electrode terminal. An insulation layer embeds the wiring component and the third and fourth connection terminals. A wiring layer is formed on a lower surface of the insulation layer and connected to an internal connection terminal and the third and fourth external terminals. Upper surfaces of the first to fourth external terminals are located coplanar with one another.
1. A wiring substrate comprising:
a wiring component adapted to be connected to a first semiconductor element and a second semiconductor element, wherein the first semiconductor element includes a first electrode terminal and a second electrode terminal, and the second semiconductor element includes a third electrode terminal and a fourth electrode terminal, wherein
the wiring component includes
a first connection terminal exposed on an upper surface of the wiring component and adapted to be connected to the first electrode terminal of the first semiconductor element,
a second connection terminal exposed on the upper surface of the wiring component and adapted to be connected to the third electrode terminal of the second semiconductor element, and
an internal connection terminal formed on a lower surface of the wiring component, and
the first connection terminal is electrically connected to the second connection terminal within the wiring component;
a third connection terminal adapted to be connected to the second electrode terminal of the first semiconductor element;
a fourth connection terminal adapted to be connected to the fourth electrode terminal of the second semiconductor element;
an insulation layer that embeds the wiring component, the third connection terminal, and the fourth connection terminal, wherein the insulation layer covers lower and side surfaces of the wiring component, lower and side surfaces of the third connection terminal, and lower and side surfaces of the fourth connection terminal and exposes an upper surface of the wiring component, an upper surface of the third connection terminal, and an upper surface of the fourth connection terminal; and
a wiring layer formed on a lower surface of the insulation layer and connected to the internal connection terminal, wherein
an upper surface of the first connection terminal, an upper surface of the second connection terminal, the upper surface of the third connection terminal, and the upper surface of the fourth connection terminal are located coplanar with one another.
2. The wiring substrate according to claim 1 , wherein
the third connection terminal and the fourth connection terminal are rod-shaped and extended in a thickness-wise direction of the insulation layer, and
a length of each of the third connection terminal and the fourth connection terminal in the thickness-wise direction of the insulation layer corresponds to a thickness of the wiring component.
3. The wiring substrate according to claim 1 , wherein
the upper surfaces of the first to fourth connection terminals are located coplanar with the upper surface of the wiring component and an upper surface of the insulation layer.
4. The wiring substrate according to claim 1 , wherein
the upper surfaces of the first to fourth connection terminals are located coplanar with the upper surface of the wiring component and located at a position lower than an upper surface of the insulation layer.
5. A semiconductor device comprising:
a wiring substrate;
a first semiconductor element that includes a first electrode terminal and a second electrode terminal; and
a second semiconductor element that includes a third electrode terminal and a fourth electrode terminal, wherein
the wiring substrate includes:
a wiring component connected to the first semiconductor element and the second semiconductor element,
wherein the wiring component includes
a first connection terminal exposed on an upper surface of the wiring component and connected to the first electrode terminal of the first semiconductor element,
a second connection terminal exposed on the upper surface of the wiring component and connected to the third electrode terminal of the second semiconductor element, and
an internal connection terminal formed on a lower surface of the wiring component, and
the wiring component electrically connects the first electrode terminal of the first semiconductor element and the third electrode terminal of the second semiconductor element;
a third connection terminal connected to the second electrode terminal of the first semiconductor element;
a fourth connection terminal connected to the fourth electrode terminal of the second semiconductor element;
an insulation layer that embeds the wiring component, the third connection terminal, and the fourth connection terminal, wherein the insulation layer covers lower and side surfaces of the wiring component, lower and side surfaces of the third connection terminal, and lower and side surfaces of the fourth connection terminal and exposes an upper surface of the wiring component, an upper surface of the third connection terminal, and an upper surface of the fourth connection terminal; and
a wiring layer formed on a lower surface of the insulation layer and connected to the internal connection terminal, wherein
an upper surface of the first connection terminal, an upper surface of the second connection terminal, the upper surface of the third connection terminal, and the upper surface of the fourth connection terminal are located coplanar with one another.