IP Library › Granted Patent US 10,361,243
Granted Patent B2
US 10,361,243 · App. 15/843,013 · Granted Jul 23, 2019

Method for making CMOS image sensor including superlattice to enhance infrared light absorption

Inventors: Robert J. Mears (Wellesley, MA); Marek Hytha (Brookline, MA)
Assignee: ATOMERA INCORPORATED
H01L27/14692H01L27/14649H01L27/14685H01L31/03529H01L31/035236H01L27/1463H01L27/14621H01L27/14627
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Quick Facts
Patent No.
US 10,361,243
App. No.
15/843,013
Granted
Jul 23, 2019
Kind
B2
Abstract

A method for making a CMOS image sensor may include forming a plurality of laterally adjacent infrared (IR) photodiode structures on a semiconductor substrate having a first conductivity type. Forming each IR photodiode structure may include forming a superlattice on the semiconductor substrate including a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and a non-semiconductor monolayer(s) constrained within a crystal lattice of adjacent base semiconductor portions. The superlattice may have the first conductivity type. A semiconductor layer may be formed on the superlattice, along with a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type, a first well around a periphery of the retrograde well having the first conductivity type, and a second well above the retrograde well having the first conductivity type.

Claims (40)

1. A method for making a CMOS image sensor comprising:

forming a plurality of laterally adjacent infrared (IR) photodiode structures on a semiconductor substrate having a first conductivity type by

forming a superlattice on the semiconductor substrate comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the superlattice having the first conductivity type,

forming a semiconductor layer on the superlattice,

forming a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type,

forming a first well around a periphery of the retrograde well having the first conductivity type, and

forming a second well above the retrograde well having the first conductivity type.

2. The method of claim 1 wherein the first well defines a ring, and wherein the second well is within the ring.

3. The method of claim 1 further comprising forming a respective microlens overlying each of the IR photodiode structures.

4. The method of claim 1 further comprising forming a respective IR filter overlying each of the IR photodiode structures.

5. The method of claim 1 further comprising forming a respective shallow trench isolation (STI) region between pairs of laterally adjacent IR photodiode structures.

6. The method of claim 1 further comprising forming an oxide layer overlying the second well of each IR photodiode structure.

7. The method of claim 1 wherein the at least one non-semiconductor monolayer comprises oxygen.

8. The method of claim 1 wherein the semiconductor monolayers comprise silicon.

9. A method for making a CMOS image sensor comprising:

forming a plurality of laterally adjacent infrared (IR) photodiode structures on a semiconductor substrate having a first conductivity type by

forming a superlattice on the semiconductor substrate comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, the superlattice having the first conductivity type; and

forming a semiconductor layer on the superlattice,

forming a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type,

forming a first well around a periphery of the retrograde well having the first conductivity type, and

forming a second well above the retrograde well having the first conductivity type;

forming a respective IR filter overlying each of the IR photodiode structures; and

forming a respective microlens overlying each of the IR filters.

10. The method of claim 9 wherein the first well defines a ring, and wherein the second well is within the ring.

11. The method of claim 9 further comprising forming a respective shallow trench isolation (STI) region between pairs of laterally adjacent photodiode structures.

12. The method of claim 9 further comprising forming an oxide layer overlying the second well of each photodiode structure.

13. The method of claim 9 wherein the at least one non-semiconductor monolayer comprises oxygen.

14. The method of claim 9 wherein the semiconductor monolayers comprise silicon.

15. A method for making a CMOS image sensor comprising:

forming a plurality of laterally adjacent infrared (IR) photodiode structures on a semiconductor substrate having a first conductivity type by

forming a superlattice on the semiconductor substrate comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions, the superlattice having the first conductivity type,

forming a semiconductor layer on the superlattice,

forming a retrograde well extending downward into the semiconductor layer from a surface thereof and having a second conductivity type,

forming a first well around a periphery of the retrograde well having the first conductivity type, and

forming a second well above the retrograde well having the first conductivity type.

16. The method of claim 15 wherein the first well defines a ring, and wherein the second well is within the ring.

17. The method of claim 15 further comprising forming a respective microlens overlying each of the IR photodiode structures.

18. The method of claim 15 further comprising forming a respective IR filter overlying each of the IR photodiode structures.

19. The method of claim 15 further comprising forming a respective shallow trench isolation (STI) region between pairs of laterally adjacent IR photodiode structures.

20. The method of claim 15 further comprising forming an oxide layer overlying the second well of each IR photodiode structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2018
From: HYTHA, MAREK; MEARS, ROBERT J.
To: ATOMERA INCORPORATED
Reel/Frame 044699/0592 →
Continuity (1)
Related Publication 20190189677A1 · Jun 20, 2019
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