IP Library › Granted Patent US 12,439,618
Granted Patent B2
US 12,439,618 · App. 18/520,131 · Granted Oct 7, 2025

Bipolar junction transistors including emitter-base and base-collector superlattices

Inventor: Richard Burton (Phoenix, AZ)
Assignee: ATOMERA INCORPORATED
H10D10/051H10D10/40H10D62/137H10D62/177H10D62/8162
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Quick Facts
Patent No.
US 12,439,618
App. No.
18/520,131
Granted
Oct 7, 2025
Kind
B2
Abstract

A bipolar junction transistor (BJT) may include a substrate defining a collector region therein. A first superlattice may be on the substrate including a plurality of stacked groups of first layers, with each group of first layers including a first plurality of stacked base semiconductor monolayers defining a first base semiconductor portion, and at least one first non-semiconductor monolayer constrained within a crystal lattice of adjacent first base semiconductor portions. Furthermore, a base may be on the first superlattice, and a second superlattice may be on the base including a second plurality of stacked groups of second layers, with each group of second layers including a plurality of stacked base semiconductor monolayers defining a second base semiconductor portion, and at least one second non-semiconductor monolayer constrained within a crystal lattice of adjacent second base semiconductor portions. An emitter may be on the second superlattice.

Claims (29)

1. A bipolar junction transistor (BJT) comprising:

a silicon substrate defining a collector region therein;

a first superlattice on the silicon substrate comprising a plurality of stacked groups of first layers, each group of first layers comprising a first plurality of stacked base silicon monolayers defining a first base semiconductor portion, and at least one first non-semiconductor monolayer constrained within a crystal lattice of adjacent first base silicon portions;

a silicon-germanium (SiGe) base on the first superlattice; and

an emitter on the SiGe base.

2. The BJT of claim 1 wherein the emitter comprises polysilicon.

3. The BJT of claim 1 comprising a second superlattice between the SiGe base and the emitter.

4. The BJT of claim 1 wherein the silicon substrate further defines a sub-collector region below the collector region.

5. The BJT of claim 4 comprising a third superlattice between the collector region and the sub-collector region.

6. The BJT of claim 1 comprising an emitter contact on an upper surface of the emitter, and a base contact on at least a portion of the SiGe base.

7. The BJT of claim 1 wherein the at least one non-semiconductor monolayer comprises oxygen.

8. A bipolar junction transistor (BJT) comprising:

a silicon substrate defining a collector region therein;

a first superlattice on the silicon substrate comprising a plurality of stacked groups of first layers, each group of first layers comprising a first plurality of stacked base silicon monolayers defining a first base semiconductor portion, and at least one first oxygen monolayer constrained within a crystal lattice of adjacent first base silicon portions;

a silicon-germanium (SiGe) base on the first superlattice; and

a polysilicon emitter on the SiGe base.

9. The BJT of claim 8 comprising a second superlattice between the SiGe base and the emitter.

10. The BJT of claim 8 wherein the silicon substrate further defines a sub-collector region below the collector region.

11. The BJT of claim 10 comprising a third superlattice between the collector region and the sub-collector region.

12. The BJT of claim 8 comprising an emitter contact on an upper surface of the emitter, and a base contact on at least a portion of the SiGe base.

13. A bipolar junction transistor (BJT) comprising:

a silicon substrate defining a collector region therein;

a first superlattice on the silicon substrate comprising a plurality of stacked groups of first layers, each group of first layers comprising a first plurality of stacked base silicon monolayers defining a first base semiconductor portion, and at least one first oxygen monolayer constrained within a crystal lattice of adjacent first base silicon portions;

a silicon-germanium (SiGe) base on the first superlattice;

an emitter on the SiGe base; and

a second superlattice between the SiGe base and the emitter.

14. The BJT of claim 13 wherein the silicon substrate further defines a sub-collector region below the collector region.

15. The BJT of claim 14 comprising a third superlattice between the collector region and the sub-collector region.

16. The BJT of claim 13 comprising an emitter contact on an upper surface of the emitter, and a base contact on at least a portion of the SiGe base.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2023
From: BURTON, RICHARD
To: ATOMERA INCORPORATED
Reel/Frame 065678/0589 →
Continuity (4)
Continuation 17873426 · Jul 26, 2022
Division 16913546 · Jun 26, 2020
Provisional Application 62960851 · Jan 14, 2020
Related Publication 20240097003A1 · Mar 21, 2024
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