Memory device with vpass step to reduce hot carrier injection type of program disturb
Apparatuses and techniques are described for reducing an injection type of program disturb in a memory device. A voltage on a selected word line is increased in a first step from an initial level such as 0 V to an intermediate, pass level such as Vpass, and in a second step from Vpass to a peak program level of Vpgm. A voltage on an adjacent unselected word line can be increased from the initial level to Vpass and then temporarily increased to an elevated level of Vpass_el during the second step increase on the selected word line. This helps reduce the magnitude of a channel gradient between the selected word line and the adjacent word line. The increase to Vpass_el may be implemented for program loops in the later part of a program operation, when Vpgm and the risk of program disturb is relatively high.
1. An apparatus, comprising:
a set of memory cells arranged in NAND strings, the set of memory cells comprises memory cells connected to a selected word line and memory cells connected to a first unselected word line which is adjacent to the selected word line, and the memory cells connected to the selected word line comprise selected memory cells and unselected memory cells;
a control circuit, the control circuit, to program the selected memory cells in one program loop, is configured to increase a voltage on the selected word line to a program level, to hold the voltage on the selected word line at the program level, to provide a voltage on the first unselected word line at an elevated pass level during the increase of the voltage on the selected word line, and at a nominal pass level, which is lower than the elevated pass level, during the hold of the voltage on the selected word line; and
a second unselected word line adjacent to the selected word line, wherein the first unselected word line is programmed before the selected word line, the second unselected word line is programmed after the selected word line, and the control circuit is configured to provide a voltage on the second unselected word line at the nominal pass level during the increase of the voltage on the selected word line and during the hold of the voltage on the selected word line.
2. The apparatus of claim 1 , wherein:
the control circuit is configured to increase the voltage on the first unselected word line to the elevated pass level during the increase of the voltage on the selected word line to the program level.
3. The apparatus of claim 1 , wherein:
the control circuit is configured to decrease the voltage on the first unselected word line from the elevated pass level to the nominal pass level after the voltage on the selected word reaches the program level.
4. The apparatus of claim 1 , wherein:
the control circuit is configured to increase the voltage on the first unselected word line to the elevated pass level from the nominal pass level.
5. The apparatus of claim 1 , wherein:
the increase of the voltage on the selected word line comprises a step from an initial level to the nominal pass level, and a step from the nominal pass level to the program level; and
an increase of the voltage on the first unselected word line comprises a step from an initial level to the nominal pass level, and a step from the nominal pass level to the elevated pass level.
6. The apparatus of claim 1 , wherein:
the one program loop is in a program pass comprising multiple program loops; and
the control circuit is configured to track a program loop number during the program pass and to provide the voltage on the first unselected word line at the elevated pass level during the increase of the voltage on the selected word line, in response to the program loop number reaching a transition program loop number.
7. The apparatus of claim 6 , wherein:
the transition program loop number is an increasing function of a temperature.
8. The apparatus of claim 6 , wherein:
the transition program loop number is a decreasing function of a number of program-erase cycles of the set of memory cells.
9. The apparatus of claim 1 , wherein:
a magnitude of the elevated pass level is an increasing function of the program level.
10. The apparatus of claim 1 , wherein:
a magnitude of the elevated pass level is a decreasing function of a temperature.
11. The apparatus of claim 1 , wherein:
the elevated pass level is up to 30% higher than the nominal pass level; and
the program level is at least 50% higher than the nominal pass level.
12. A method, comprising:
stepping up a voltage on a selected word line from an initial level to a nominal pass level, and from the nominal pass level to a program level, and holding the voltage at the program level; and
stepping up a voltage on an unselected word line which is adjacent to the selected word line from an initial level to the nominal pass level, and from the nominal pass level to an elevated pass level which is less than the program level, holding the voltage on the unselected word line at the elevated pass level, stepping down the voltage on the unselected word line from the elevated pass level to the nominal pass level, and holding the voltage on the unselected word line at the nominal pass level, wherein the voltage on the unselected word line is held at the elevated pass level from a time before the stepping up of the voltage on the selected word line from the nominal pass level to the program level until a time after the stepping up of the voltage on the selected word line from the nominal pass level to the program level, when the voltage of the selected word line is held at the program level.
13. The method of claim 12 , wherein:
the stepping up of the voltage of the unselected word line from the nominal pass level to the elevated pass level occurs in response to a program loop number reaching a transition program loop number in a program pass.
14. The method of claim 12 , wherein:
the stepping up of the voltage of the unselected word line from the nominal pass level to the elevated pass level occurs in response to the program level reaching a transition program level in a program pass.
15. The method of claim 12 , further comprising:
applying a voltage at the nominal pass level to remaining unselected word lines while the voltage on the unselected word line is held at the elevated pass level.
16. The method of claim 12 , further comprising:
holding the voltage on the unselected word line at the nominal pass level after the stepping up the voltage on the unselected word line from the initial level to the nominal pass level, and before the stepping up the voltage on the unselected word line from the nominal pass level to the elevated pass level.
17. An apparatus, comprising:
a set of memory cells, the memory cells are arranged in NAND strings and connected to word lines;
means for increasing a voltage on a selected word line to a program level;
means for holding the voltage on the selected word line at the program level;
means for providing a voltage on a first unselected word line adjacent to and on a source side of the selected word line at an elevated pass level during the increasing of the voltage on the selected word line;
means for providing a voltage on a second unselected word line adjacent to and on a drain side of the selected word line at a nominal pass level, lower than the elevated pass level, during the increasing of the voltage on the selected word line; and
means for providing the voltage on the first unselected word line at the nominal pass level during the holding of the voltage on the selected word line at the program level.
18. The apparatus of claim 17 , further comprising:
means for increasing the voltage on the first unselected word line to the elevated pass level during the increasing of the voltage on the selected word line.
19. The apparatus of claim 17 , further comprising:
means for increasing the voltage on the first unselected word line to the elevated pass level before the increasing of the voltage on the selected word line.