IP Library Granted Patent US 10,553,589
Granted Patent B2
US 10,553,589 · App. 15/995,204 · Granted Feb 4, 2020

Semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Jun Koyama (Kanagawa, JP); Kiyoshi Kato (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1052H01L27/105H01L27/108H01L27/1156H01L27/11551H01L27/124H01L27/1225H01L27/1255H01L29/24H01L29/7869H01L29/78696G11C13/003G11C13/0007G11C2213/79H01L27/11H01L28/40
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Quick Facts
Patent No.
US 10,553,589
App. No.
15/995,204
Granted
Feb 4, 2020
Kind
B2
Abstract

An object of one embodiment of the present invention is to provide a semiconductor device with a novel structure in which stored data can be stored even when power is not supplied in a data storing time and there is no limitation on the number of times of writing. The semiconductor device includes a first transistor which includes a first channel formation region using a semiconductor material other than an oxide semiconductor, a second transistor which includes a second channel formation region using an oxide semiconductor material, and a capacitor. One of a second source electrode and a second drain electrode of the second transistor is electrically connected to one electrode of the capacitor.

Claims (40)

1. A semiconductor device comprising:

a driver circuit comprising a second transistor;

an insulating layer over the second transistor; and

a memory cell over the insulating layer, the memory cell comprising:

a first transistor, a channel formation region of the first transistor comprising a first oxide semiconductor layer; and

a capacitor, one electrode of the capacitor electrically connected to one of a source and a drain of the first transistor.

2. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises indium, gallium, and zinc.

3. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises a crystal region.

4. The semiconductor device according to claim 1 ,

wherein a gate of the first transistor is electrically connected to a word line,

wherein the other of the source and the drain of the first transistor is electrically connected to a bit line, and

wherein the other electrode of the capacitor is electrically connected to a capacitor line.

5. The semiconductor device according to claim 1 , wherein an off-state current per micrometer of a channel width of the first transistor is 100 zA/μm or less at room temperature.

6. The semiconductor device according to claim 1 , wherein a channel formation region of the second transistor comprises a semiconductor material.

7. An electronic device comprising the semiconductor device according to claim 1 .

8. A semiconductor device comprising:

a driver circuit comprising a second transistor;

an insulating layer over the second transistor; and

a memory cell over the insulating layer, the memory cell comprising:

a first transistor, a channel formation region of the first transistor comprising a first oxide semiconductor layer; and

a capacitor comprising a second oxide semiconductor layer, one electrode of the capacitor electrically connected to one of a source and a drain of the first transistor.

9. The semiconductor device according to claim 8 , wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium, and zinc.

10. The semiconductor device according to claim 8 , wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises a crystal region.

11. The semiconductor device according to claim 8 ,

wherein a gate of the first transistor is electrically connected to a word line,

wherein the other of the source and the drain of the first transistor is electrically connected to a bit line, and

wherein the other electrode of the capacitor is electrically connected to a capacitor line.

12. The semiconductor device according to claim 8 , wherein an off-state current per micrometer of a channel width of the first transistor is 100 zA/μm or less at room temperature.

13. The semiconductor device according to claim 8 , wherein a channel formation region of the second transistor comprises a semiconductor material.

14. An electronic device comprising the semiconductor device according to claim 8 .

15. The semiconductor device according to claim 1 , wherein a channel formation region of the second transistor comprises silicon.

16. The semiconductor device according to claim 1 ,

wherein a gate of the first transistor is electrically connected to a word line,

wherein the other of the source and the drain of the first transistor is electrically connected to a bit line, and

wherein the other electrode of the capacitor is electrically connected to a capacitor line.

17. The semiconductor device according to claim 8 , wherein a channel formation region of the second transistor comprises silicon.

18. The semiconductor device according to claim 8 ,

wherein a gate of the first transistor is electrically connected to a word line,

wherein the other of the source and the drain of the first transistor is electrically connected to a bit line, and

wherein the other electrode of the capacitor is electrically connected to a capacitor line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2018
From: YAMAZAKI, SHUNPEI; KOYAMA, JUN; KATO, KIYOSHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 045963/0335 →
Priority Claims (1)
JP 2009-296202 · Dec 25, 2009 · national
Continuity (4)
Continuation 15157565 · May 18, 2016
Continuation 13905178 · May 30, 2013
Continuation 12976564 · Dec 22, 2010
Related Publication 20180286864A1 · Oct 4, 2018
Cited By (15)
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