IP Library › Granted Patent US 10,840,410
Granted Patent B2
US 10,840,410 · App. 16/804,504 · Granted Nov 17, 2020

Ultrathin solid state dies and methods of manufacturing the same

Inventors: Vladimir Odnoblyudov (Eagle, ID); Martin F. Schubert (Mountain View, CA)
Assignee: Micron Technology, Inc.
H01L33/20H01L21/02104H01L33/0075H01L33/0093H01L33/08H01L33/12H01L33/38H01L33/483H01L33/62H01L2933/0016
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Quick Facts
Patent No.
US 10,840,410
App. No.
16/804,504
Granted
Nov 17, 2020
Kind
B2
Abstract

Various embodiments of SST dies and solid state lighting (“SSL”) devices with SST dies, assemblies, and methods of manufacturing are described herein. In one embodiment, a SST die includes a substrate material, a first semiconductor material and a second semiconductor material on the substrate material, an active region between the first semiconductor material and the second semiconductor material, and a support structure defined by the substrate material. In some embodiments, the support structure has an opening that is vertically aligned with the active region.

Claims (34)

1. A solid state transducer (SST) die, comprising:

a growth substrate;

a SST structure on the growth substrate, the SST structure including a first semiconductor material and a second semiconductor material;

a first contact on the first semiconductor material;

a second contact on the second semiconductor material;

an insulating material on the SST structure, the first contact and the second contact; and

a conductive material on the insulating material and in contact with the first contact and the second contact;

wherein the growth substrate includes an opening aligned with the second contact and a rigid structure aligned with the first contact.

2. The SST die of claim 1 , further comprising a gap between the first contact and the second semiconductor material.

3. The SST die of claim 2 , wherein the first semiconductor material is exposed at a bottom portion of the gap.

4. The SST die of claim 1 , further comprising a peripheral gap between an outward-facing sidewall of the first contact and an outside edge of the first semiconductor material.

5. The SST die of claim 4 , wherein the first semiconductor material is exposed at a bottom portion of the peripheral gap.

6. The SST die of claim 1 , wherein the first semiconductor material is directly in contact with the growth substrate.

7. The SST die of claim 6 , further comprising an active region on the first semiconductor material.

8. The SST die of claim 7 , wherein the second semiconductor material is on the active region.

9. The SST die of claim 1 , wherein the first contact is on a first side of the first semiconductor material, and wherein a second side of the first semiconductor material is exposed through the opening.

10. The SST die of claim 1 , further comprising a buffer material between the growth substrate and the first semiconductor material.

11. The SST die of claim 10 , wherein the buffer material is exposed through the opening.

12. The SST die of claim 1 , wherein the SST structure includes a contact opening, and wherein the first contact is formed in the contact opening.

13. The SST die of claim 1 , wherein the insulating material includes a plurality of channels extending therethrough.

14. The SST die of claim 1 , wherein the growth substrate has a thickness of about 20 to about 50 microns.

15. The SST die of claim 1 , further comprising: a channel dividing the conductive material into a first terminal and a second terminal.

16. The SST die of claim 1 , wherein the growth substrate comprises an engineered substrate having a structural material and a growth surface suitable for epitaxy, and wherein the support structure comprises silicon on poly-aluminum nitride and the growth surface comprises silicon (1,1,1).

17. A solid state transducer (SST) die, comprising:

a growth substrate;

a buffer material on the growth substrate;

a SST structure on the growth substrate, the SST structure including a first semiconductor material and a second semiconductor material;

a first contact on the first semiconductor material;

a second contact on the second semiconductor material;

an insulating material on the SST structure, the first contact and the second contact; and

a conductive material on the insulating material and in contact with the first contact and the second contact;

wherein the growth substrate includes an opening aligned with the second contact and a rigid structure aligned with the first contact.

18. The SST die of claim 17 , wherein the support structure comprises silicon on poly-aluminum nitride and the growth surface comprises silicon (1,1,1), and further comprising:

a channel dividing the conductive material into a first terminal and a second terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2020
From: ODNOBLYUDOV, VLADIMIR; SCHUBERT, MARTIN F.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051962/0669 →
Continuity (5)
Continuation 16377897 · Apr 8, 2019
Continuation 16022409 · Jun 28, 2018
Continuation 15474786 · Mar 30, 2017
Division 13918745 · Jun 14, 2013
Related Publication 20200251615A1 · Aug 6, 2020
Cited By (1)
US 12,206,046