IP Library Granted Patent US 10,867,576
Granted Patent B2
US 10,867,576 · App. 16/525,643 · Granted Dec 15, 2020

Semiconductor device, and display device and electronic device utilizing the same

Inventors: Hajime Kimura (Kanagawa, JP); Yutaka Shionoiri (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G5/003G09G3/36H01L27/124H01L27/1255H03K19/018507G09G2310/0267G09G2310/0275G09G2310/0286G09G2310/0289G09G2330/021
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Quick Facts
Patent No.
US 10,867,576
App. No.
16/525,643
Granted
Dec 15, 2020
Kind
B2
Abstract

A semiconductor device having a normal function means is provided, in which the amplitude of an output signal is prevented from being decreased even when a digital circuit using transistors having one conductivity is employed. By turning OFF a diode-connected transistor 101 , the gate terminal of a first transistor 102 is brought into a floating state. At this time, the first transistor 102 is ON and its gate-source voltage is stored in a capacitor. Then, when a potential at the source terminal of the first transistor 102 is increased, a potential at the gate terminal of the first transistor 102 is increased as well by bootstrap effect. As a result, the amplitude of an output signal is prevented from being decreased.

Claims (23)

1. A display device comprising: a first transistor; a second transistor; a third transistor; a fourth transistor; and a fifth transistor, wherein: one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; a gate of the first transistor is electrically connected to a first wiring; the one of the source and the drain of the first transistor is electrically connected to a gate of the third transistor; a gate of the first transistor is electrically connected to a second wiring; one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor; the other of the source and the drain of the third transistor is electrically connected to a third wiring; the other of the source and the drain of the fourth transistor is electrically connected to a fourth wiring; one of a source and a drain of the fifth transistor is electrically connected to the fourth wiring; the other of the source and the drain of the fifth transistor is electrically connected to a fifth wiring; a gate of the fifth transistor is electrically connected to a second wiring; the first wiring is configured to be supplied with a first signal; the second wiring is configured to be supplied with a second signal; the third wiring is configured to be supplied with a third signal; and the fifth wiring is configured to be supplied with a first potential.

2. The display device according to claim 1 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor have the same polarity.

3. The display device according to claim 1 , wherein the first transistor, the second transistor, the third transistor the fourth transistor and the fifth transistor are each an N-channel transistor.

4. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor; and

a fifth transistor,

wherein:

one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor;

a gate of the first transistor is electrically connected to a first wiring;

the one of the source and the drain of the first transistor is electrically connected to a gate of the third transistor;

a gate of the first transistor is electrically connected to a second wiring;

one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor;

the other of the source and the drain of the third transistor is electrically connected to a third wiring;

the other of the source and the drain of the fourth transistor is electrically connected to a fourth wiring;

one of a source and a drain of the fifth transistor is electrically connected to the fourth wiring;

the other of the source and the drain of the fifth transistor is electrically connected to a fifth wiring; and

a gate of the fifth transistor is electrically connected to a second wiring.

5. The semiconductor device according to claim 4 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor have the same polarity.

6. The semiconductor device according to claim 4 , wherein the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth are each an N-channel transistor.

7. The semiconductor device according to claim 4 , comprising a gate line driver circuit comprising the first transistor, the second transistor, the third transistor, the fourth transistor and the fifth transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2019
From: KIMURA, HAJIME; SHIONOIRI, YUTAKA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 049905/0073 →
Priority Claims (1)
JP 2002-374098 · Dec 25, 2002 · national
Continuity (11)
Continuation 16178650 · Nov 2, 2018
Continuation 15880590 · Jan 26, 2018
Continuation 15582886 · May 1, 2017
Continuation 14941739 · Nov 16, 2015
Continuation 14472748 · Aug 29, 2014
Continuation 13906934 · May 31, 2013
Continuation 13277301 · Oct 20, 2011
Continuation 12849885 · Aug 4, 2010
Continuation 11675122 · Feb 15, 2007
Continuation 10740840 · Dec 22, 2003
Related Publication 20200027420A1 · Jan 23, 2020
Cited By (6)
US 12,453,180 US 12,490,518 US 12,520,589 US 12,614,534 US 12,652,049 US 12,720,869