IP Library › Granted Patent US 10,942,455
Granted Patent B2
US 10,942,455 · App. 16/370,279 · Granted Mar 9, 2021

Manufacturing method of semiconductor chip, and kit

Inventor: Tetsuya Kamimura (Haibara-gun, JP)
Assignee: FUJIFILM Corporation
G03F7/327B24B37/00G03F7/038G03F7/039G03F7/0392G03F7/0397G03F7/0752G03F7/0758G03F7/16G03F7/167G03F7/2004G03F7/2006G03F7/325G03F7/40H01L21/027H01L21/0274H01L21/28H01L21/304H01L21/3065H01L21/31116H01L21/32H01L21/321H01L21/3205H01L21/3212H01L21/768H01L21/7684H01L21/76802H01L21/76829H01L21/76843H01L21/76877
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Quick Facts
Patent No.
US 10,942,455
App. No.
16/370,279
Granted
Mar 9, 2021
Kind
B2
Abstract

The present invention provides a manufacturing method of a semiconductor chip, in which the manufacturing yield is excellent, and a kit. According to the present invention, a manufacturing method of a semiconductor chip includes Process 1 of forming an insulating layer on a base material, Process 2 of forming a patterned resist film on the insulating layer, Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask, Process 4 of removing the patterned resist film, Process 5 of filling the opening portion of the insulating layer with metal, and Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal. In at least one process of Process 1 to Process 6, a chemical liquid which includes an organic solvent and metal impurities including at least one metal atom selected from the group consisting of a Fe atom, a Cr atom, a Ni atom, and a Pb atom, and in which the total content of the metal atom is 0.001 to 100 mass ppt is used.

Claims (89)

1. A manufacturing method of a semiconductor chip, the method comprising:

Process 1 of forming an insulating layer on a base material;

Process 2 of forming a patterned resist film on the insulating layer;

Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask;

Process 4 of removing the patterned resist film;

Process 5 of filling the opening portion of the insulating layer with metal; and

Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal,

wherein, in at least one process of Process 1 to Process 6,

a chemical liquid which includes an organic solvent and metal impurities including at least one metal atom selected from the group consisting of a Fe atom, a Cr atom, a Ni atom, and a Pb atom, and in which the total content of the metal atom is 0.001 to 100 mass ppt is used,

wherein the chemical liquid includes organic impurities, and

the total content of the organic impurities in the chemical liquid is 0.1 to 5000 mass ppm with respect to the total mass of the chemical liquid, and

wherein the organic impurity is one kind or more selected from the group consisting of dioctyl phthalate, diisononyl phthalate, dioctyl adipate, dibutyl phthalate, ethylene rubber, ethylene propylene rubber, and an addition polymer of 5-ethylidene-2-norbornene.

2. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein the number of counting targets which are provided in the chemical liquid, have a size of 0.1 μm or greater, and are to be counted by a light scattering type in-liquid particle counter is equal to or smaller than 100 pieces/mL.

3. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein the chemical liquid includes water, and

the content of the water in the chemical liquid is 0.01 to 1.0 mass % with respect to the total mass of the chemical liquid.

4. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein the organic solvent is selected from the group consisting of methanol, ethanol, 1-propanol, isopropanol, propylene glycol monomethyl ether, propylene glycol monoethyl ether, propylene glycol monopropyl ether, propylene glycol monomethyl ether acetate, ethyl lactate, methyl methoxypropionate, cyclopentanone, cyclohexanone, γ-butyrolactone, diisoamyl ether, butyl acetate, and 4-methyl-2-pentanol.

5. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein Process 2 includes

Process 2-1 of coating the insulating layer with a pre-wet liquid,

Process 2-2 of forming a coated film by applying a composition for forming a resist film onto the insulating layer coated with the pre-wet liquid, and

Process 2-3 of forming the patterned resist film by exposing the coated film in a pattern shape and performing a developing treatment with a developer, and

the chemical liquid is used as at least one of the pre-wet liquid or the developer.

6. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein Process 2 includes

Process 2-1 of coating the insulating layer with a pre-wet liquid,

Process 2-2 of forming a coated film by applying a composition for forming a resist film onto the insulating layer coated with the pre-wet liquid,

Process 2-3 of forming the patterned resist film by exposing the coated film in a pattern shape and performing a developing treatment with a developer, and

Process 2-4 of washing the patterned resist film by using a rinse liquid after Process 2-3, and

the chemical liquid is used as the rinse liquid.

7. The manufacturing method of a semiconductor chip according to claim 5 ,

wherein the exposing is performed by EUV light.

8. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein the patterned resist film is a metal hard mask.

9. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein, in Process 1, the insulating layer including a silicon atom is formed by using a physical vapor deposition method, a chemical vapor deposition method, or a spin coating method.

10. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein, in Process 3, etching of the insulating layer is performed by plasma etching with an etching gas which includes a nitrogen gas and a halogen gas.

11. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein, in Process 4, the patterned resist film is removed by a treatment with a treatment liquid which includes an alkaline component and an organic solvent, or by oxygen ashing.

12. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein, in Process 4, a treatment of removing impurities which have been generated by etching performed in Process 3 is performed.

13. The manufacturing method of a semiconductor chip according to claim 12 ,

wherein the treatment of removing impurities is performed by a washing treatment with a treatment liquid including a hydroxylamine compound.

14. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein, in Process 5, the opening portion of the insulating layer is filled with metal by any of a physical vapor deposition method, a chemical vapor deposition method, or a plating method.

15. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein, in Process 5, the metal is Cu, Al, Co, W, Ta, TaN, Ti, TiN, Ru, Mn, or an alloy thereof.

16. The manufacturing method of a semiconductor chip according to claim 15 ,

wherein Process 5 includes

Process 5-1 of filling the opening portion of the insulating layer with first metal selected from the group consisting of Ta, TaN, Ti, TiN, Ru, Mn, and an alloy thereof, and

Process 5-2 of further filling the opening portion which has been filled with the first metal, with second metal selected from the group consisting of Cu, Al, Co, W, and an alloy thereof.

17. The manufacturing method of a semiconductor chip according to claim 16 ,

wherein Process 6 includes Process 6-1 of performing the chemical-mechanical polishing with a polishing liquid which includes amino acid.

18. The manufacturing method of a semiconductor chip according to claim 16 ,

wherein Process 6 includes Process 6-2 of performing the chemical-mechanical polishing with a polishing liquid which includes organic acid and exhibits alkalinity.

19. The manufacturing method of a semiconductor chip according to claim 1 , further comprising:

a process of performing a washing treatment on the insulating layer subjected to the chemical-mechanical polishing, with a washing liquid which includes polyvalent carboxylic acid, after Process 6.

20. The manufacturing method of a semiconductor chip according to claim 1 , further comprising:

a process of forming an etching stopper layer on the base material before Process 1.

21. The manufacturing method of a semiconductor chip according to claim 1 ,

wherein all or some of Process 1 to Process 6 are repeated after Process 1 to Process 6 are performed.

22. A manufacturing method of a semiconductor chip, the method comprising:

Process 1 of forming an insulating layer on a base material;

Process 2 of forming a patterned resist film on the insulating layer;

Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask;

Process 4 of removing the patterned resist film;

Process 5 of filling the opening portion of the insulating layer with metal; and

Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal,

wherein, in at least one process of Process 1 to Process 6,

a chemical liquid which includes an organic solvent and metal impurities including at least one metal atom selected from the group consisting of a Fe atom, a Cr atom, a Ni atom, and a Pb atom, and in which the total content of the metal atom is 0.001 to 100 mass ppt is used, and

wherein Process 2 includes

Process 2-1 of coating the insulating layer with a pre-wet liquid,

Process 2-2 of forming a coated film by applying a composition for forming a resist film onto the insulating layer coated with the pre-wet liquid,

Process 2-3 of forming the patterned resist film by exposing the coated film in a pattern shape and performing a developing treatment with a developer, and

Process 2-4 of washing the patterned resist film by using a rinse liquid after Process 2-3, and

the chemical liquid is used as the rinse liquid.

23. A manufacturing method of a semiconductor chip, the method comprising:

Process 1 of forming an insulating layer on a base material;

Process 2 of forming a patterned resist film on the insulating layer;

Process 3 of forming the insulating layer having an opening portion by etching the insulating layer with the patterned resist film as a mask;

Process 4 of removing the patterned resist film;

Process 5 of filling the opening portion of the insulating layer with metal; and

Process 6 of performing chemical-mechanical polishing on the insulating layer filled with metal,

wherein, in at least one process of Process 1 to Process 6,

a chemical liquid which includes an organic solvent and metal impurities including at least one metal atom selected from the group consisting of a Fe atom, a Cr atom, a Ni atom, and a Pb atom, and in which the total content of the metal atom is 0.001 to 100 mass ppt is used, and

the content of the Pb atom in the chemical liquid is 0.001 to 50 mass ppt.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2019
From: KAMIMURA, TETSUYA
To: FUJIFILM CORPORATION
Reel/Frame 049012/0735 →
Priority Claims (1)
JP JP2016-193257 · Sep 30, 2016 · national
Continuity (2)
Continuation PCTJP2017035438 · Sep 29, 2017
Related Publication 20190227440A1 · Jul 25, 2019
Cited By (2)
US 12,228,857 US 12,265,329