Serial data communication modes on TDI/TDO, receive TMS, send TMS
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication terminals. The Tap's TMS and/or TCK terminal can be used as a serial I/O communication channel between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC. The use of the TMS and/or TCK terminal as serial I/O channels, as described, does not effect the standardized operation of the JTAG Tap, since the TMS and/or TCK I/O operations occur while the Tap is placed in a non-active steady state.
1. An electrical device comprising:
(a) a TDI terminal, a TCK terminal, a TMS terminal, and TDO terminal; and
(b) control circuitry coupled to the terminals and adapting the terminals to operate in one of three separate modes of serial data communication, the three separate modes of serial communication including;
(i) a first serial data communication mode in which serial data is received on the TDI terminal that is coupled to an input of a shift register, and data is transmitted on the TDO terminal that is coupled to an output of the shift register;
(ii) a second serial data communication mode in which serial data is received on the TMS terminal, is coupled to a serial input of a parallel output register, and is coupled to a parallel input of a parallel data destination; and
(iii) a third serial data communication mode in which parallel data from a parallel data source is coupled to a parallel input register, and serial data from a serial output of the parallel input register is coupled to and transmitted on the TMS terminal.
2. The electrical device of claim 1 in which the device is an integrated circuit on a substrate.
3. The electrical device of claim 1 in which the device is an embedded core circuit within an integrated circuit.
4. A process of operating an electrical device comprising:
(a) communicating serial data in a first mode by receiving serial data on a TDI terminal that is coupled to an input of a shift register and transmitting data on a TDO terminal from an output of the shift register;
(b) communicating serial data in a second mode by receiving serial data on a TMS terminal, coupling the received serial data to a serial input of a parallel output register, and coupling received parallel data to a parallel input of a parallel data destination; and
(c) communicating serial data in a third mode by coupling parallel data from a parallel data source to a parallel input register, and transmitting serial data on the TMS terminal from a serial output of the parallel input register.
5. The process of claim 1 including receiving and transmitting serial data on an integrated circuit on a substrate.
6. The process of claim 1 including receiving and transmitting serial data in an embedded core circuit within an integrated circuit.
7. The electrical device of claim 1 in which the control circuitry includes a state machine coupled to the TCK terminal and the TMS terminal and providing a Test Logic Reset state, a Run Test/Idle state, a Select-DR state, and a Select-IR state in response to clock signals on the TCK terminal and a mode select signal on the TMS terminal.
8. The electrical device of claim 1 including an integrated circuit that includes the terminals and the control circuitry.
9. The electrical device of claim 1 in which the control circuitry includes access port circuitry coupled to the TCK terminal, the TDI terminal, the TDO terminal, and the TMS terminal and including state circuitry operable according to IEEE 1149.1 protocol and coupled to the TMS terminal and the TCK terminal, an instruction register connected to the TDI terminal, and a data register connected to the TDI terminal.
10. The electrical device of claim 9 in in which the access port circuitry includes multiplexer circuitry coupling the instruction register and the data register to the TDO terminal.
11. The electrical device of claim 9 in in which the data register has bus leads for updating and outputting data to other circuits and for capturing data from other circuits.
12. The electrical device of claim 9 in in which the access port circuitry includes state machine circuitry having four state output bits defining sixteen states.
13. The electrical device of claim 9 in in which the access port circuitry includes state machine circuitry having four state output bits defining sixteen states that include a Test Logic Reset state, a Run Test/Idle state, a Select-DR state, and a Select-IR state.
14. The electrical device of claim 1 in which the control circuitry includes serial communication circuitry coupled to the TMS terminal to input data serially from the TMS terminal and to output data serially to the TMS terminal.
15. The electrical device of claim 10 in in which the serial communication circuitry includes a counter operable to store a count of parallel data.