IP Library Granted Patent US 11,201,249
Granted Patent B2
US 11,201,249 · App. 16/944,410 · Granted Dec 14, 2021

Liquid crystal display device comprising an oxide semiconductor

Inventors: Shunpei Yamazaki (Setagaya, JP); Kengo Akimoto (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78696H01L21/0234H01L21/02318H01L21/02323H01L21/02565H01L29/247H01L29/4908H01L29/66969H01L29/7869H01L29/78693
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,201,249
App. No.
16/944,410
Granted
Dec 14, 2021
Kind
B2
Abstract

An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

Claims (89)

1. A liquid crystal display device comprising:

a transistor, the transistor comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide layer comprising In, Ga, and Zn over the gate insulating layer; and

a conductive layer over the oxide layer;

a first insulating layer over the conductive layer;

a second insulating layer comprising an organic material over the first insulating layer;

a pixel electrode layer electrically connected to the transistor over the second insulating layer;

an alignment film over the pixel electrode layer; and

a liquid crystal layer over the alignment film,

wherein the conductive layer is configured to function as one of a source electrode and a drain electrode of the transistor,

wherein the conductive layer comprises a first conductive layer and a second conductive layer over the first conductive layer,

wherein an end portion of the second conductive layer does not overlap with an end portion of the first conductive layer,

wherein the end portion of the second conductive layer recedes from the end portion of the first conductive layer,

wherein the oxide layer has a first region in contact with the conductive layer and a second region in contact with the first insulating layer,

wherein a thickness of the second region is smaller than a thickness of the first region,

wherein the oxide layer comprises a first oxide layer and a second oxide layer over the first oxide layer,

wherein the second oxide layer is provided between the first oxide layer and the conductive layer, and

wherein, in a cross-sectional view in a channel length direction of the transistor, a bottom surface of the conductive layer is completely in contact with a top surface of the oxide layer.

2. A liquid crystal display device comprising:

a transistor, the transistor comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide layer comprising In, Ga, and Zn over the gate insulating layer; and

a conductive layer over the oxide layer;

a first insulating layer over the conductive layer;

a second insulating layer comprising an organic material over the first insulating layer;

a pixel electrode layer electrically connected to the transistor over the second insulating layer;

an alignment film over the pixel electrode layer; and

a liquid crystal layer over the alignment film,

wherein the conductive layer is configured to function as one of a source electrode and a drain electrode of the transistor,

wherein the conductive layer comprises a first conductive layer and a second conductive layer over the first conductive layer,

wherein an end portion of the second conductive layer does not overlap with an end portion of the first conductive layer,

wherein the end portion of the second conductive layer recedes from the end portion of the first conductive layer,

wherein the oxide layer has a first region in contact with the conductive layer and a second region in contact with the first insulating layer,

wherein a thickness of the second region is smaller than a thickness of the first region, and

wherein, in a cross-sectional view in a channel length direction of the transistor, a bottom surface of the conductive layer is completely in contact with a top surface of the oxide layer.

3. A liquid crystal display device comprising:

a transistor, the transistor comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide layer comprising In, Ga, and Zn over the gate insulating layer; and

a conductive layer over the oxide layer;

a first insulating layer over the conductive layer;

a second insulating layer comprising an organic material over the first insulating layer;

a pixel electrode layer electrically connected to the transistor over the second insulating layer;

an alignment film over the pixel electrode layer; and

a liquid crystal layer over the alignment film,

wherein the conductive layer is configured to function as one of a source electrode and a drain electrode of the transistor,

wherein the conductive layer comprises a first conductive layer and a second conductive layer over the first conductive layer,

wherein an end portion of the second conductive layer does not overlap with an end portion of the first conductive layer,

wherein the oxide layer comprises a first oxide layer and a second oxide layer over the first oxide layer, and

wherein the second oxide layer is provided between the first oxide layer and the conductive layer.

4. A liquid crystal display device comprising:

a transistor, the transistor comprising:

a gate electrode layer over a substrate;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer comprising In, Ga, and Zn over the gate insulating layer;

a second oxide semiconductor layer comprising In, Ga, and Zn over the first oxide semiconductor layer;

a first conductive layer over and electrically in contact with the first oxide semiconductor layer and the second oxide semiconductor layer;

a second conductive layer over and electrically in contact with the first oxide semiconductor layer and the second oxide semiconductor layer;

a first insulating layer over the first conductive layer and the second conductive layer;

a second insulating layer comprising an organic material over the first insulating layer;

a pixel electrode layer electrically connected to the transistor over the second insulating layer;

wherein the second conductive layer is configured to function as one of a source electrode and a drain electrode of the transistor,

wherein the second conductive layer comprises a third conductive layer and a fourth conductive layer over the third conductive layer, and

wherein an end portion of the third conductive layer extends beyond an end portion of the fourth conductive layer.

5. The liquid crystal display device according to claim 4 ,

wherein the substrate comprises glass,

wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer, the first gate insulating layer comprising silicon oxide and the second gate insulating layer comprising silicon nitride,

wherein the pixel electrode is electrically connected to the second conductive layer via an opening provided in the first insulating layer and the second insulating layer,

wherein the first insulating layer comprises silicon oxide, and

wherein the transistor is a channel-etched transistor.

6. The liquid crystal display device according to claim 4 ,

wherein the substrate comprises glass,

wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer, the first gate insulating layer comprising silicon oxide and the second gate insulating layer comprising silicon nitride,

wherein the pixel electrode is electrically connected to the second conductive layer via an opening provided in the first insulating layer and the second insulating layer,

wherein the first insulating layer comprises silicon oxide,

wherein end portions of the first oxide semiconductor layer extend beyond end portions of the gate electrode layer,

wherein the first conductive layer is configured to function as the other of the source electrode and the drain electrode of the transistor,

wherein the first conductive layer comprises a fifth conductive layer and a sixth conductive layer,

wherein a first end portion of the fifth conductive layer extends beyond a first end portion of the sixth conductive layer,

wherein a second end portion of the fifth conductive layer extends beyond a second end portion of the sixth conductive layer, and

wherein a thickness of the fifth conductive layer is smaller than a thickness of the sixth conductive layer.

7. The liquid crystal display device according to claim 1 , wherein the oxide layer comprises crystals with a grain size of higher than or equal to 1 nm and smaller than or equal to 10 nm.

8. The liquid crystal display device according to claim 2 , wherein the oxide layer comprises crystals with a grain size of higher than or equal to 1 nm and smaller than or equal to 10 nm.

9. The liquid crystal display device according to claim 3 , wherein the oxide layer comprises crystals with a grain size of higher than or equal to 1 nm and smaller than or equal to 10 nm.

10. The liquid crystal display device according to claim 4 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises crystals with a grain size of higher than or equal to 1 nm and smaller than or equal to 10 nm.

Priority Claims (1)
JP 2008-224034 · Sep 1, 2008 · national
Continuity (7)
Continuation 16372930 · Apr 2, 2019
Continuation 15909165 · Mar 1, 2018
Continuation 14947109 · Nov 20, 2015
Continuation 14471632 · Aug 28, 2014
Continuation 13356044 · Jan 23, 2012
Continuation 12549415 · Aug 28, 2009
Related Publication 20200381565A1 · Dec 3, 2020