Physical page, logical page, and codeword correspondence

1. An apparatus, comprising:

a number of memory devices;

a plurality of physical buffers segmented into a plurality of logical buffer segments, wherein each logical buffer segment corresponds to a codeword payload size, and wherein each physical buffer corresponds to a physical page size; and

a controller coupled to the number of memory devices and to the plurality of physical buffers, and configured to:

populate host sectors into a logical page of data;

allocate a number of the plurality of logical buffer segments for the logical page of data; and

at least partially fill the number of the plurality of logical buffer segments with the logical page of data such that the logical page of data traverses at least one logical buffer boundary and at least one host sector traverses a logical buffer boundary.

2. The apparatus of claim 1 , wherein the controller is further configured to:

fill a first portion of a first one of the allocated logical buffer segments with physical page metadata;

map a location of a starting portion for logical page metadata at an end of the physical page metadata;

fill a second portion of the first one of the allocated logical buffer segments with the logical page metadata; and

map a location of a starting portion for the host sectors at an end of the logical page metadata.

3. The apparatus of claim 1 , wherein the controller is further configured to map a link from a first one of the allocated logical buffer segments to a second one of the allocated logical buffer segments, the link used in association with the host sector that traverses the logical buffer boundary, wherein the logical buffer boundary is a boundary between the first one and the second one of the allocated logical buffer segments.

4. The apparatus of claim 1 , wherein the controller is configured to at least partially fill the allocated logical buffer segments on a host sector by host sector basis.

5. The apparatus of claim 1 , wherein the controller is configured to at least partially fill the allocated logical buffer segments such that the logical page of data fills all but one of the allocated logical buffer segments.

6. The apparatus of claim 1 , wherein the apparatus includes an error coding component configured to error code the logical page of data and a non-integer number of additional logical pages of data as an integer number of codewords.

7. The apparatus of claim 1 , wherein the plurality of physical buffers are internal to the controller.

8. The apparatus of claim 1 , wherein the plurality of physical buffers are external to the controller.

9. The apparatus of claim 1 , wherein the controller is configured to:

identify a plurality of logical pages for wear leveling;

read a number of codewords corresponding to the plurality of logical pages into a first number of the plurality of logical buffer segments;

allocate a second number of the plurality of logical buffer segments for the wear leveling;

using linked lists, reposition buffer payloads of the number of codewords into the second number of the plurality of logical buffer segments; and

write a portion of the repositioned codewords corresponding to the plurality of logical pages to a physical page of memory.

10. The apparatus of claim 9 , wherein the number of codewords include a number of host sectors and wherein the portion of the number of codewords excludes at least one of the number of host sectors.

11. A method, comprising:

populating, by a controller, host sectors into a logical page of data;

allocating, by the controller, a number of a plurality of logical buffer segments of a plurality of physical buffers for the logical page of data,

wherein each logical buffer segment corresponds to a codeword payload size, and

wherein each physical buffer corresponds to a physical page size; and

at least partially filling, by the controller, the number of the plurality of logical buffer segments with the logical page of data such that the logical page of data traverses at least one logical buffer boundary and at least one host sector traverses a logical buffer boundary.

12. The method of claim 11 , further comprising:

filling a first portion of a first one of the allocated logical buffer segments with physical page metadata;

mapping a location of a starting portion for logical page metadata at an end of the physical page metadata;

filling a second portion of the first one of the allocated logical buffer segments with the logical page metadata; and

mapping a location of a starting portion for the host sectors at an end of the logical page metadata.

13. The method of claim 11 , further comprising mapping a link from a first one of the allocated logical buffer segments to a second one of the allocated logical buffer segments, the link used in association with the host sector that traverses the logical buffer boundary, wherein the logical buffer boundary is a boundary between the first one and the second one of the allocated logical buffer segments.

14. The method of claim 11 , further comprising at least partially filling the allocated logical buffer segments on a host sector by host sector basis.

15. The method of claim 11 , further comprising at least partially filling the allocated logical buffer segments such that the logical page of data fills all but one of the allocated logical buffer segments.

16. The method of claim 11 , further comprising error coding the logical page of data and a non-integer number of additional logical pages of data as an integer number of codewords.

17. The method of claim 11 , further comprising:

identifying a plurality of logical pages for wear leveling;

reading a number of codewords corresponding to the plurality of logical pages into a first number of the plurality of logical buffer segments;

allocating a second number of the plurality of logical buffer segments for the wear leveling;

using linked lists, repositioning buffer payloads of the number of codewords into the second number of the plurality of logical buffer segments; and

writing a portion of the repositioned codewords corresponding to the plurality of logical pages to a physical page of memory.

18. A non-transitory machine readable medium storing instructions that when executed by a machine cause the machine to:

populate host sectors into a logical page of data;

allocate a number of a plurality of logical buffer segments of a plurality of physical buffers for the logical page of data,

wherein each logical buffer segment corresponds to a codeword payload size, and

wherein each physical buffer corresponds to a physical page size; and

at least partially fill the number of the plurality of logical buffer segments with the logical page of data such that the logical page of data traverses at least one logical buffer boundary and at least one host sector traverses a logical buffer boundary.

19. The medium of claim 18 , wherein the instructions are executable to:

fill a first portion of a first one of the allocated logical buffer segments with physical page metadata;

map a location of a starting portion for logical page metadata at an end of the physical page metadata;

fill a second portion of the first one of the allocated logical buffer segments with the logical page metadata; and

map a location of a starting portion for the host sectors at an end of the logical page metadata.

20. The medium of claim 18 , wherein the instructions are executable to:

map a link from a first one of the allocated logical buffer segments to a second one of the allocated logical buffer segments, the link used in association with the host sector that traverses the logical buffer boundary, wherein the logical buffer boundary is a boundary between the first one and the second one of the allocated logical buffer segments.