Liquid crystal display device including transistor comprising oxide semiconductor
An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
1. A liquid crystal display device comprising:
a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; and
a seventh transistor in a pixel portion,
wherein one of a source electrode and a drain electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, one of a source electrode and a drain electrode of the third transistor, one of a source electrode and a drain electrode of the fourth transistor, and one of a source electrode and a drain electrode of the fifth transistor are electrically connected to a first wiring,
wherein a gate of the first transistor is electrically connected to the other of the source electrode and the drain electrode of the fourth transistor and the other of the source electrode and the drain electrode of the fifth transistor,
wherein a gate of the fifth transistor is electrically connected to a gate of the third transistor,
wherein a second wiring is electrically connected to a gate of the second transistor and a gate of the sixth transistor,
wherein one of a source electrode and a drain electrode of the sixth transistor is electrically connected to the other of the source electrode and the drain electrode of the fifth transistor,
wherein the seventh transistor comprises:
a gate electrode layer;
a gate insulating layer over the gate electrode layer;
a first oxide semiconductor layer comprising In, Ga, and Zn over the gate insulating layer;
a second oxide semiconductor layer over the first oxide semiconductor layer; and
a conductive film over the second oxide semiconductor layer,
wherein a first insulating layer is provided over the conductive film,
wherein a second insulating layer is provided over the first insulating layer,
wherein the second insulating layer comprises an organic material,
wherein a pixel electrode layer is provided over the second insulating layer,
wherein the pixel electrode layer is electrically connected to the seventh transistor,
wherein an alignment film is provided over the pixel electrode layer,
wherein a liquid crystal layer is provided over the alignment film,
wherein the conductive film is configured to function as one of a source electrode and a drain electrode of the seventh transistor,
wherein the conductive film comprises a first layer and a second layer over the first layer,
wherein an end portion of the second layer does not overlap with an end portion of the first layer,
wherein the end portion of the second layer recedes from the end portion of the first layer, and
wherein the second oxide semiconductor layer is provided between the first oxide semiconductor layer and the conductive film.
2. A liquid crystal display device comprising:
a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; and
a seventh transistor in a pixel portion,
wherein one of a source electrode and a drain electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, one of a source electrode and a drain electrode of the third transistor, one of a source electrode and a drain electrode of the fourth transistor, and one of a source electrode and a drain electrode of the fifth transistor are electrically connected to a first wiring,
wherein a gate of the first transistor is electrically connected to the other of the source electrode and the drain electrode of the fourth transistor and the other of the source electrode and the drain electrode of the fifth transistor,
wherein a gate of the fifth transistor is electrically connected to a gate of the third transistor,
wherein a second wiring is electrically connected to a gate of the second transistor and a gate of the sixth transistor,
wherein one of a source electrode and a drain electrode of the sixth transistor is electrically connected to the other of the source electrode and the drain electrode of the fifth transistor,
wherein the seventh transistor comprises:
a gate electrode layer;
a gate insulating layer over the gate electrode layer;
an oxide semiconductor layer comprising In, Ga, and Zn over the gate insulating layer; and
a conductive film over the oxide semiconductor layer,
wherein a first insulating layer is provided over the conductive film,
wherein a second insulating layer is provided over the first insulating layer,
wherein the second insulating layer comprises an organic material,
wherein a pixel electrode layer is provided over the second insulating layer,
wherein the pixel electrode layer is electrically connected to the seventh transistor,
wherein an alignment film is provided over the pixel electrode layer,
wherein a liquid crystal layer is provided over the alignment film,
wherein the conductive film is configured to function as one of a source electrode and a drain electrode of the seventh transistor,
wherein the conductive film comprises a first layer and a second layer over the first layer,
wherein an end portion of the second layer does not overlap with an end portion of the first layer,
wherein the end portion of the second layer recedes from the end portion of the first layer,
wherein the oxide semiconductor layer has a first region overlapping with the conductive film and a second region in contact with the first insulating layer, and
wherein a thickness of the second region is smaller than a thickness of the first region.
3. A liquid crystal display device comprising:
a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; and
a seventh transistor in a pixel portion,
wherein one of a source electrode and a drain electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, one of a source electrode and a drain electrode of the third transistor, one of a source electrode and a drain electrode of the fourth transistor, and one of a source electrode and a drain electrode of the fifth transistor are electrically connected to a first wiring,
wherein a gate of the first transistor is electrically connected to the other of the source electrode and the drain electrode of the fourth transistor and the other of the source electrode and the drain electrode of the fifth transistor,
wherein a gate of the fifth transistor is electrically connected to a gate of the third transistor,
wherein a second wiring is electrically connected to a gate of the second transistor and a gate of the sixth transistor,
wherein one of a source electrode and a drain electrode of the sixth transistor is electrically connected to the other of the source electrode and the drain electrode of the fifth transistor,
wherein the seventh transistor comprises:
a gate electrode layer;
a gate insulating layer over the gate electrode layer;
a first oxide semiconductor layer comprising In, Ga, and Zn over the gate insulating layer;
a second oxide semiconductor layer over the first oxide semiconductor layer; and
a conductive film over the second oxide semiconductor layer,
wherein a first insulating layer is provided over the conductive film,
wherein a second insulating layer is provided over the first insulating layer,
wherein the second insulating layer comprises an organic material,
wherein a pixel electrode layer is provided over the second insulating layer,
wherein the pixel electrode layer is electrically connected to the seventh transistor,
wherein an alignment film is provided over the pixel electrode layer,
wherein a liquid crystal layer is provided over the alignment film,
wherein the conductive film is configured to function as one of a source electrode and a drain electrode of the seventh transistor,
wherein the conductive film comprises a first layer and a second layer over the first layer,
wherein an end portion of the second layer does not overlap with an end portion of the first layer, and
wherein the second oxide semiconductor layer is provided between the first oxide semiconductor layer and the conductive film.
4. A liquid crystal display device comprising:
a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; and
a seventh transistor in a pixel portion,
wherein one of a source electrode and a drain electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, one of a source electrode and a drain electrode of the third transistor, one of a source electrode and a drain electrode of the fourth transistor, and one of a source electrode and a drain electrode of the fifth transistor are electrically connected to a first wiring,
wherein a gate of the first transistor is electrically connected to the other of the source electrode and the drain electrode of the fourth transistor and the other of the source electrode and the drain electrode of the fifth transistor,
wherein a gate of the fifth transistor is electrically connected to a gate of the third transistor,
wherein a second wiring is electrically connected to a gate of the second transistor and a gate of the sixth transistor,
wherein one of a source electrode and a drain electrode of the sixth transistor is electrically connected to the other of the source electrode and the drain electrode of the fifth transistor,
wherein the seventh transistor comprises:
a gate electrode layer over a substrate;
a gate insulating layer over the gate electrode layer;
a first oxide semiconductor layer comprising In, Ga, and Zn over the gate insulating layer;
a second oxide semiconductor layer comprising In, Ga, and Zn over the first oxide semiconductor layer;
a source electrode layer over and electrically connected to the second oxide semiconductor layer; and
a drain electrode layer over and electrically connected to second oxide semiconductor layer,
wherein a first insulating layer is provided over the source electrode layer and the drain electrode layer,
wherein a second insulating layer is provided over the first insulating layer,
wherein the second insulating layer comprises an organic material,
wherein a pixel electrode layer is provided over the second insulating layer,
wherein the pixel electrode layer is electrically connected to the seventh transistor,
wherein one of the source electrode layer and the drain electrode layer of the seventh transistor comprises a first layer and a second layer over the first layer, and
wherein an end portion of the first layer extends beyond an end portion of the second layer.
5. The liquid crystal display device according to claim 4 ,
wherein the substrate comprises glass,
wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer, the first gate insulating layer comprising silicon oxide and the second gate insulating layer comprising silicon nitride,
wherein the pixel electrode layer is electrically connected to one of the source electrode and the drain electrode of the seventh transistor via an opening provided in the first insulating layer and the second insulating layer,
wherein the first insulating layer comprises silicon oxide, and
wherein the seventh transistor is a channel-etched transistor.
6. The liquid crystal display device according to claim 4 ,
wherein the substrate comprises glass,
wherein the gate insulating layer comprises a first gate insulating layer and a second gate insulating layer, the first gate insulating layer comprising silicon oxide and the second gate insulating layer comprising silicon nitride,
wherein the pixel electrode layer is electrically connected to one of the source electrode and the drain electrode of the seventh transistor via an opening provided in the first insulating layer and the second insulating layer,
wherein the first insulating layer comprises silicon oxide,
wherein an end portion of the first oxide semiconductor layer extends beyond an end portion of the gate electrode layer of the seventh transistor,
wherein the other of the source electrode and the drain electrode of the seventh transistor comprises a third layer and a fourth layer,
wherein a first end portion of the third layer extends beyond a first end portion of the fourth layer,
wherein a second end portion of the third layer extends beyond a second end portion of the fourth layer, and
wherein a thickness of the third layer is smaller than a thickness of the fourth layer.
7. The liquid crystal display device according to claim 1 , wherein the first oxide semiconductor layer comprises a crystal with a grain size of greater than or equal to 1 nm and smaller than or equal to 10 nm.
8. The liquid crystal display device according to claim 2 , wherein the oxide semiconductor layer comprises a crystal with a grain size of greater than or equal to 1 nm and smaller than or equal to 10 nm.
9. The liquid crystal display device according to claim 3 , wherein the first oxide semiconductor layer comprises a crystal with a grain size of greater than or equal to 1 nm and smaller than or equal to 10 nm.
10. The liquid crystal display device according to claim 4 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises a crystal with a grain size of greater than or equal to 1 nm and smaller than or equal to 10 nm.