IP Library › Granted Patent US 11,887,553
Granted Patent B2
US 11,887,553 · App. 18/092,489 · Granted Jan 30, 2024

Display device

Inventor: Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G3/3648G02F1/1368G02F1/13624G02F1/133753G02F1/136213H01L27/1225G02F2202/10G09G2300/0809G09G2310/08H01L29/045H01L29/7869H10K50/12H10K50/19H10K59/32
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Quick Facts
Patent No.
US 11,887,553
App. No.
18/092,489
Granted
Jan 30, 2024
Kind
B2
Abstract

A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10 zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100 zA/μm per micrometer in the channel width.

Claims (45)

1. A display device comprising:

a pixel portion comprising a transistor and a pixel electrode electrically connected to the transistor; and

a gate line driver circuit electrically connected to a gate electrode of the transistor,

wherein the transistor comprises an oxide semiconductor layer comprising a c-axis aligned crystalline region,

wherein the pixel portion is configured to display a still image in a first period,

wherein the pixel portion is configured to display a moving image in a second period,

wherein a frequency of writing image signals to the pixel electrode in the first period is lower than a frequency of writing image signals to the pixel electrode in the second period,

wherein the image signals are written to the pixel electrode through the transistor,

wherein the first period comprises a period in which supply of a start pulse and a clock signal to the gate line driver circuit is stopped, and

wherein the first period comprises a period in which a power supply potential supplied to the gate line driver circuit is changed from a high power supply potential to a low power supply potential.

2. The display device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

3. The display device according to claim 1 , further comprising a comparison circuit configured to detect a difference between image signals in a successive frame periods.

4. The display device according to claim 1 , wherein the display device comprises an organic electroluminescence element.

5. The display device according to claim 1 , wherein the display device comprises a liquid crystal element and an organic electroluminescence element.

6. A display device comprising:

a pixel portion comprising a transistor and a pixel electrode electrically connected to the transistor; and

a gate line driver circuit electrically connected to a gate electrode of the transistor,

wherein the transistor comprises a first oxide semiconductor layer over the gate electrode and a second oxide semiconductor layer over the first oxide semiconductor layer,

wherein the second oxide semiconductor layer comprises a c-axis aligned crystalline region,

wherein the pixel portion is configured to display a still image in a first period,

wherein the pixel portion is configured to display a moving image in a second period,

wherein a frequency of writing image signals to the pixel electrode in the first period is lower than a frequency of writing image signals to the pixel electrode in the second period,

wherein the image signals are written to the pixel electrode through the transistor,

wherein the first period comprises a period in which supply of a start pulse and a clock signal to the gate line driver circuit is stopped, and

wherein the first period comprises a period in which a power supply potential supplied to the gate line driver circuit is changed from a high power supply potential to a low power supply potential.

7. The display device according to claim 6 , wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium, and zinc.

8. The display device according to claim 6 , further comprising a comparison circuit configured to detect a difference between image signals in a successive frame periods.

9. The display device according to claim 6 , wherein the display device comprises an organic electroluminescence element.

10. The display device according to claim 6 , wherein the display device comprises a liquid crystal element and an organic electroluminescence element.

11. A display device comprising:

a pixel portion comprising a transistor and a pixel electrode electrically connected to the transistor; and

a gate line driver circuit electrically connected to a gate electrode of the transistor,

wherein the transistor comprises a first oxide semiconductor layer over the gate electrode, a second oxide semiconductor layer over the first oxide semiconductor layer, a source electrode, and a drain electrode,

wherein the second oxide semiconductor layer comprises a c-axis aligned crystalline region,

wherein the pixel electrode is in direct contact with one of the source electrode and the drain electrode,

wherein the pixel portion is configured to display a still image in a first period,

wherein the pixel portion is configured to display a moving image in a second period,

wherein a frequency of writing image signals to the pixel electrode in the first period is lower than a frequency of writing image signals to the pixel electrode in the second period,

wherein the image signals are written to the pixel electrode through the transistor,

wherein the first period comprises a period in which supply of a start pulse and a clock signal to the gate line driver circuit is stopped, and

wherein the first period comprises a period in which a power supply potential supplied to the gate line driver circuit is changed from a high power supply potential to a low power supply potential.

12. The display device according to claim 11 , wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium, and zinc.

13. The display device according to claim 11 , further comprising a comparison circuit configured to detect a difference between image signals in a successive frame periods.

14. The display device according to claim 11 , wherein the display device comprises an organic electroluminescence element.

15. The display device according to claim 11 , wherein the display device comprises a liquid crystal element and an organic electroluminescence element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2023
From: YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 062256/0900 →
Priority Claims (1)
JP 2010-012665 · Jan 24, 2010 · national
Continuity (6)
Continuation 17692277 · Mar 11, 2022
Continuation 16666672 · Oct 29, 2019
Continuation 15451541 · Mar 7, 2017
Continuation 14505593 · Oct 3, 2014
Continuation 13011535 · Jan 21, 2011
Related Publication 20230138117A1 · May 4, 2023