IP Library Granted Patent US 12,009,434
Granted Patent B2
US 12,009,434 · App. 18/098,769 · Granted Jun 11, 2024

Semiconductor device including transistors and method for manufacturing the same

Inventors: Hidekazu Miyairi (Kanagawa, JP); Takeshi Osada (Kanagawa, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/02565H01L21/47635H01L21/477H01L27/1225H01L27/1251H01L27/1259H01L29/24H01L29/41733H01L29/42356H01L29/42384H01L29/45H01L29/66969H01L29/78621H01L29/78645H01L29/78648
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Quick Facts
Patent No.
US 12,009,434
App. No.
18/098,769
Granted
Jun 11, 2024
Kind
B2
Abstract

As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.

Claims (27)

1. A semiconductor device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the fifth transistor and a first wiring,

wherein the first wiring has a function of transmitting a signal which is output from a circuit comprising the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor,

wherein a first conductive layer has a function of a gate of the first transistor,

wherein a second conductive layer has a function of one of a source and a drain of the third transistor and one of a source and a drain of the fourth transistor,

wherein a third conductive layer has a function of a gate of the second transistor,

wherein the first conductive layer is electrically connected to the third conductive layer through the second conductive layer,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the third transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring,

wherein the gate of the third transistor is electrically connected to a gate of the fifth transistor, and

wherein the second transistor comprises a channel formation region over and overlapping with the third conductive layer.

2. A semiconductor device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the fifth transistor and a first wiring,

wherein the first wiring has a function of transmitting a signal which is output from a circuit comprising the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor,

wherein a first conductive layer has a function of a gate of the first transistor,

wherein a second conductive layer has a function of one of a source and a drain of the third transistor and one of a source and a drain of the fourth transistor,

wherein a third conductive layer has a function of a gate of the second transistor,

wherein the first conductive layer is electrically connected to the third conductive layer through the second conductive layer,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the third transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring,

wherein the gate of the third transistor is electrically connected to a gate of the fifth transistor,

wherein the second transistor comprises a channel formation region over and overlapping with the third conductive layer, and

wherein the first conductive layer is electrically connected to the third conductive layer without a semiconductor layer therebetween.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: MIYAIRI, HIDEKAZU; OSADA, TAKESHI; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 062420/0391 →
Priority Claims (1)
JP 2008-274540 · Oct 24, 2008 · national
Continuity (9)
Continuation 17002971 · Aug 26, 2020
Continuation 16180565 · Nov 5, 2018
Continuation 15814919 · Nov 16, 2017
Continuation 15443096 · Feb 27, 2017
Continuation 15071674 · Mar 16, 2016
Continuation 14694212 · Apr 23, 2015
Continuation 13302222 · Nov 22, 2011
Continuation 12581918 · Oct 20, 2009
Related Publication 20230155033A1 · May 18, 2023
Cited By (2)
US 12,190,842 US 12,477,781