Display device
A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10 zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100 zA/μm per micrometer in the channel width.
1. A semiconductor device comprising:
a transistor comprising an oxide semiconductor layer comprising a channel formation region,
a capacitor electrically connected to the transistor,
wherein the transistor is configured to hold a voltage applied to the capacitor,
wherein a frequency of applying a voltage to the capacitor through the transistor in a first period is lower than a frequency of applying a voltage to the capacitor through the transistor in a second period, and
wherein the channel formation region of the transistor comprises a c-axis aligned crystalline region.
2. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.
3. The semiconductor device according to claim 1 ,
wherein an off current per micrometer of a channel width of the transistor is less than 10 zA/μm at room temperature.
4. The semiconductor device according to claim 1 ,
wherein an off current per micrometer of a channel width of the transistor is less than 100 zA/μm at 85° C.
5. The semiconductor device according to claim 1 , wherein the semiconductor device comprises a liquid crystal element and an organic electroluminescence element.
6. The semiconductor device according to claim 1 ,
wherein the semiconductor device is a display device comprising a pixel portion, and
wherein the pixel portion comprises the transistor and the capacitor.
7. A semiconductor device comprising:
a transistor comprising an oxide semiconductor layer comprising a channel formation region,
a capacitor electrically connected to the transistor,
wherein the transistor is configured to hold a voltage applied to the capacitor,
wherein a frequency of applying a voltage to the capacitor through the transistor in a first period is lower than a frequency of applying a voltage to the capacitor through the transistor in a second period,
wherein the channel formation region of the transistor comprises a crystalline region, and
wherein a c-axis of the crystalline region is aligned in a direction perpendicular to a surface of the oxide semiconductor layer.
8. The semiconductor device according to claim 7 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.
9. The semiconductor device according to claim 7 ,
wherein an off current per micrometer of a channel width of the transistor is less than 10 zA/μm at room temperature.
10. The semiconductor device according to claim 7 ,
wherein an off current per micrometer of a channel width of the transistor is less than 100 zA/μm at 85° C.
11. The semiconductor device according to claim 7 , wherein the semiconductor device comprises a liquid crystal element and an organic electroluminescence element.
12. The semiconductor device according to claim 7 ,
wherein the semiconductor device is a display device comprising a pixel portion, and
wherein the pixel portion comprises the transistor and the capacitor.
13. A semiconductor device comprising:
a transistor comprising an oxide semiconductor layer comprising a channel formation region,
a capacitor electrically connected to the transistor,
wherein the transistor is configured to hold a voltage applied to the capacitor,
wherein a frequency of applying a voltage to the capacitor through the transistor in a first period is lower than a frequency of applying a voltage to the capacitor through the transistor in a second period,
wherein the channel formation region of the transistor comprises a crystalline region,
wherein the crystalline region is a non-single-crystal region, and
wherein a c-axis of the crystalline region is aligned in a direction perpendicular to a surface of the oxide semiconductor layer.
14. The semiconductor device according to claim 13 , wherein the oxide semiconductor layer comprises indium, gallium, and zinc.
15. The semiconductor device according to claim 13 ,
wherein an off current per micrometer of a channel width of the transistor is less than 10 zA/μm at room temperature.
16. The semiconductor device according to claim 13 ,
wherein an off current per micrometer of a channel width of the transistor is less than 100 zA/μm at 85° C.
17. The semiconductor device according to claim 13 , wherein the semiconductor device comprises a liquid crystal element and an organic electroluminescence element.
18. The semiconductor device according to claim 13 ,
wherein the semiconductor device is a display device comprising a pixel portion, and
wherein the pixel portion comprises the transistor and the capacitor.