IP Library › Granted Patent US 12,266,531
Granted Patent B2
US 12,266,531 · App. 17/590,594 · Granted Apr 1, 2025

Method of manufacturing silicon carbide semiconductor device

Inventors: Junya Miwa (Tokyo, JP); Toshikazu Tanioka (Tokyo, JP); Daisuke Taniguchi (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L21/0465H01L21/0337H01L29/66068H01L29/1608H01L29/66712H01L29/7802
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Quick Facts
Patent No.
US 12,266,531
App. No.
17/590,594
Granted
Apr 1, 2025
Kind
B2
Abstract

A method for manufacturing a silicon carbide semiconductor device according to the technology disclosed in the present specification includes: forming a drift layer on an upper surface of a silicon carbide semiconductor substrate; forming a hard mask on the upper surface of the drift layer by anisotropic etching; and forming a first ion-implanted region in a surface layer of the drift layer by implanting ions into the drift layer in a state in which the hard mask is formed, in which the hard mask includes a sidewall perpendicular to the upper surface of the drift layer.

Claims (23)

1. A method for manufacturing a silicon carbide semiconductor device, the method comprising:

forming a drift layer on an upper surface of a silicon carbide semiconductor substrate;

forming a hard mask on an upper surface of the drift layer by anisotropic etching;

forming a first ion implantation region in a surface layer of the drift layer by implanting ions into the drift layer in a state in which the hard mask is formed; and

after forming the first ion implantation region, forming a second ion implantation region above the first ion implantation region by implanting ions into the silicon carbide semiconductor substrate in the state in which the hard mask is formed,

wherein the hard mask comprises a sidewall perpendicular to the upper surface of the drift layer.

2. The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein forming the drift layer is to form the drift layer of a first conductivity type, forming the first ion implantation region is to form the first ion implantation region of a second conductivity type by implanting ions of the second conductivity type into the drift layer in the state in which the hard mask is formed.

3. The method for manufacturing a silicon carbide semiconductor device according to claim 2 , wherein the second ion implantation region is a source region of the first conductivity type having an impurity concentration higher than that of the drift layer in a surface layer of the drift layer and is formed by implanting ions of the first conductivity type into the drift layer in the state in which the hard mask is formed.

4. The method for manufacturing a silicon carbide semiconductor device according to claim 2 , further comprising:

removing a part of the hard mask by photolithography and dry etching; and

wherein the second ion implantation region is of the second conductivity type, is in a surface layer of the drift layer, and is formed by implanting ions of the second conductivity type into the drift layer in a state in which the partially removed hard mask is formed.

5. The method for manufacturing a silicon carbide semiconductor device according to claim 4 , wherein the silicon carbide semiconductor substrate includes an active region and a dicing line to be removed by dicing, and

the forming the hard mask is to form the hard mask in the active region and form an alignment mark on the dicing line, and

removing the part of the hard mask is to remove the part of the hard mask with reference to the alignment mark.

6. The method for manufacturing a silicon carbide semiconductor device according to claim 4 , wherein removing the part of the hard mask is to remove the part of the hard mask after forming a well contact region as the first ion implantation region using the hard mask, and

forming the second ion implantation region is to form a well region as the second ion implantation region by implanting ions in the state in which the partially removed hard mask is formed.

7. The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein forming the drift layer is to form the drift layer of a first conductivity type, forming the first ion implantation region is to form the first ion implantation region of the first conductivity type having an impurity concentration higher than that of the drift layer by implanting ions of the first conductivity type into the drift layer in the state in which the hard mask is formed.

8. The method for manufacturing a silicon carbide semiconductor device according to claim 3 , further comprising:

removing a part of the hard mask by photolithography and dry etching; and

the second ion implantation region is of the second conductivity type, is in a surface layer of the drift layer, and is formed by implanting ions of the second conductivity type into the drift layer in a state in which the partially removed hard mask is formed.

9. The method for manufacturing a silicon carbide semiconductor device according to claim 5 , wherein removing the part of the hard mask is to remove the part of the hard mask after forming a well contact region as the first ion implantation region using the hard mask, and

forming the second ion implantation region is to form a well region as the second ion implantation region by implanting ions in the state in which the partially removed hard mask is formed.

10. The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein the silicon carbide semiconductor device is a JFET.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2022
From: MIWA, JUNYA; TANIOKA, TOSHIKAZU; TANIGUCHI, DAISUKE
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 058850/0684 →
Priority Claims (1)
JP 2021-069009 · Apr 15, 2021 · national
Continuity (1)
Related Publication 20220336219A1 · Oct 20, 2022
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