IP Library › Granted Patent US 12,288,838
Granted Patent B2
US 12,288,838 · App. 18/674,129 · Granted Apr 29, 2025

Unit pixel having light emitting device, pixel module and displaying apparatus

Inventor: Seung Sik Hong (Ansan-si, KR)
Assignee: Seoul Semiconductor Co., Ltd.
H01L33/62H01L25/0753H01L33/58
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Quick Facts
Patent No.
US 12,288,838
App. No.
18/674,129
Granted
Apr 29, 2025
Kind
B2
Abstract

A display apparatus including a panel substrate and a pixel module disposed thereon, in which the pixel module includes a circuit board and light emitters arranged and aligned in a first direction and disposed on the circuit board, in which each light emitter includes a light emitting layer including a first and a second conductivity type semiconductor layer, and an active layer interposed therebetween, a first and a second connection layer electrically connected to the first and the second conductivity type semiconductor layer, respectively, and a step adjustment layer disposed between the circuit board and the light emitting layer and covering a region of the light emitting layer and including an opening region configured to provide an electrical contact region between the first connection layer and the first conductivity type semiconductor layer.

Claims (66)

1. A display apparatus, comprising:

a panel substrate; and

a pixel module disposed on the panel substrate, the pixel module including:

a circuit board, and

a plurality of light emitters longitudinally extending along a first direction and disposed on the circuit board, wherein:

each light emitter of the plurality of light emitters comprises:

a light emitting layer including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer interposed between the first and second conductivity type semiconductor layers;

a first connection layer electrically connected to the first conductivity type semiconductor layer;

a second connection layer electrically connected to the second conductivity type semiconductor layer; and

a step adjustment layer disposed between the circuit board and the light emitting layer and covering a region of the light emitting layer,

the plurality of light emitters in the pixel module are arranged and aligned in a second direction crossing the first direction, and

the step adjustment layer includes an opening region that provides an electrical contact region between the first connection layer and the first conductivity type semiconductor layer.

2. The display apparatus of claim 1 , further comprising a light blocking layer disposed on the panel substrate.

3. The display apparatus of claim 2 , wherein the light blocking layer has a window region to transmit light generated in at least one light emitter of the plurality of light emitters.

4. The display apparatus of claim 1 , further comprising a cover layer covering the plurality of light emitters.

5. The display apparatus of claim 4 , further comprising a light blocking layer disposed between at least two light emitters of the plurality of light emitters.

6. The display apparatus of claim 5 , wherein the light blocking layer has a window region to transmit light generated in at least one of the light emitters.

7. The display apparatus of claim 1 , further comprising a protection layer covering the step adjustment layer, the first connection layer, and the second connection layer,

wherein the protection layer has a first opening formed on the first connection layer and a second opening formed on the second connection layer.

8. The display apparatus of claim 7 , further comprising:

a first bump disposed in the first opening; and

a second bump disposed in the second opening, wherein:

the first bump is electrically connected to the first connection layer, and

the second bump is electrically connected to the second connection layer.

9. A display module, comprising:

a substrate;

a light blocking layer disposed on the substrate; and

a pixel module arranged on the substrate, the pixel module including a plurality of light emitters disposed on the substrate, wherein:

each light emitter of the plurality of light emitters longitudinally extends along a first direction and comprises:

a light emitting layer including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer interposed between the first and second conductivity type semiconductor layers;

a first connection layer electrically connected to the first conductivity type semiconductor layer;

a second connection layer electrically connected to the second conductivity type semiconductor layer; and

a step adjustment layer disposed between the substrate and the light emitting layer,

the light blocking layer includes a window region to transmit light generated in at least one light emitter of the plurality of light emitters, and

the plurality of light emitters in the pixel module are arranged and aligned in a second direction crossing the first direction.

10. The display module of claim 9 , wherein the light blocking layer is disposed between at least two light emitters of the plurality of light emitters.

11. The display module of claim 9 , further comprising a cover layer covering the plurality of light emitters.

12. The display module of claim 9 , further comprising a protection layer covering the step adjustment layer, the first connection layer, and the second connection layer,

wherein the protection layer has a first opening formed on the first connection layer and a second opening formed on the second connection layer.

13. The display module of claim 12 , further comprising:

a first bump disposed in the first opening; and

a second bump disposed in the second opening, wherein:

the first bump is electrically connected to the first connection layer, and

the second bump is electrically connected to the second connection layer.

14. A light module, comprising:

a substrate; and

a plurality of light emitters disposed on the substrate, and

a blocking layer disposed on the substrate, wherein:

each light emitter of the plurality of light emitters longitudinally extends along a first direction and arranged on the substrate and comprises:

a light emitting layer including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer interposed between the first and second conductivity type semiconductor layers;

a first connection layer electrically connected to the first conductivity type semiconductor layer;

a second connection layer electrically connected to the second conductivity type semiconductor layer; and

an adhesive layer disposed on the substrate and covering a region of the light emitting layer,

the light blocking layer includes a window region to transmit light generated in at least one light emitter of the plurality of light emitters, and

the plurality of light emitters is arranged and aligned in a second direction crossing the first direction.

15. The light module of claim 14 , wherein the step adjustment layer includes a first opening region that provides a first electrical contact region between the first connection layer and the first conductivity type semiconductor layer.

16. The light module of claim 14 , wherein the step adjustment layer includes a second opening region that provides a second electrical contact region between the second connection layer and the second conductivity type semiconductor layer.

17. The light module of claim 14 , wherein the light blocking layer is disposed between at least two light emitters of the plurality of light emitters.

18. The light module of claim 14 , further comprising a cover layer covering the plurality of light emitters.

19. The light module of claim 14 , further comprising a protection layer covering the step adjustment layer, the first connection layer, and the second connection layer,

wherein the protection layer has a first opening formed on the first connection layer and a second opening formed on the second connection layer.

20. The light module of claim 19 , further comprising:

a first bump disposed in the first opening; and

a second bump disposed in the second opening, wherein:

the first bump is electrically connected to the first connection layer, and

the second bump is electrically connected to the second connection layer.

Continuity (5)
Continuation 18347165 · Jul 5, 2023
Continuation 17833734 · Jun 6, 2022
Continuation 16831973 · Mar 27, 2020
Provisional Application 62826033 · Mar 29, 2019
Related Publication 20240313186A1 · Sep 19, 2024
References Cited (41)
US 8933433B2 · Higginson · 2015 [cited by examiner]
US 9442284B2 · Kim et al. · 2016 [cited by applicant]
US 9698128B2 · Moriguchi et al. · 2017 [cited by applicant]
US 10734363B2 · Andrews · 2020 [cited by examiner]
US 10964581B1 · Torrents Abad · 2021 [cited by examiner]
US 11282820B2 · Takeya et al. · 2022 [cited by applicant]
US 11569425B2 · Bower · 2023 [cited by examiner]
US 11727857B2 · Hussell · 2023 [cited by examiner]
US 11790831B2 · Hussell · 2023 [cited by examiner]
US 20140061685A1 · Jeong · 2014 [cited by examiner]
US 20140209930A1 · Weng · 2014 [cited by examiner]
US 20140312368A1 · Lee · 2014 [cited by examiner]
US 20150247627A1 · Cope · 2015 [cited by examiner]
US 20150333241A1 · Chen · 2015 [cited by examiner]
US 20160351764A1 · Cha et al. · 2016 [cited by applicant]
US 20160351767A1 · Choi · 2016 [cited by examiner]
US 20170250318A1 · Cha · 2017 [cited by examiner]
US 20180145224A1 · Kim · 2018 [cited by examiner]
US 20190019780A1 · Kim · 2019 [cited by examiner]
US 20190074206A1 · Chen · 2019 [cited by applicant]
US 20190074266A1 · Andrews · 2019 [cited by examiner]
US 20190189853A1 · Yoo · 2019 [cited by examiner]
US 20190229097A1 · Takeya · 2019 [cited by examiner]
US 20190304960A1 · Ko · 2019 [cited by examiner]
US 20190326349A1 · Kwon · 2019 [cited by examiner]
US 20200227394A1 · Yeh · 2020 [cited by examiner]
US 20200274039A1 · Chen · 2020 [cited by examiner]
US 20210194217A1 · Carson · 2021 [cited by examiner]
CN 108388379A · 2018 [cited by applicant]
JP 2013026510 · 2013 [cited by applicant]
JP 2015197544A · 2015 [cited by applicant]
KR 1020130143300 · 2013 [cited by applicant]
KR 1020150007853 · 2015 [cited by applicant]
KR 1020190003198A · 2019 [cited by applicant]
KR 1020190026617 · 2019 [cited by applicant]
KR 1020190026617A · 2019 [cited by examiner]
Non-Final Office Action dated Jan. 5, 2022, issued to U.S. Appl. No. 16/831,973.9. [cited by applicant]
Notice of Allowance dated Apr. 14, 2022, issued to U.S. Appl. No. 16/831,973. [cited by applicant]
European Search Report dated Dec. 9, 2022, issued to European Patent Application No. 20784459.8. [cited by applicant]
Japanese Office Action issued Nov. 21, 2023 in Japanese Application 2021-552961, citing documents 1 & 15-16 therein, 4 pages. [cited by applicant]
Combined Chinese Office Action and Search Report issued Nov. 23, 2023 in Chinese Patent Application No. 202080023986.8, citing references 17 and 18 therein, 9 pages. [cited by applicant]